Commit 3359afa1 authored by Jeffrey Lee's avatar Jeffrey Lee
Browse files

Add HALSize support. Fix TEX definitions in VMSAv6 MMU file.

Detail:
  Makefile - Now uses the HALSize environment variable to select which HALSize file to export
  hdr/HALSize/64K, hdr/HALSize/96K, hdr/HALSize/128K - HALSize files for 64K, 96K, 128K HAL sizes
  hdr/MEMM/VMSAv6 - Fix the incorrect TEX definitions that were corrupting the page permissions and resulting in ROM pages being writeable.
Admin:
  Tested on rev A2 BB-xM.
  Needs latest Env folder.


Version 1.81. Tagged as 'HdrSrc-1_81'
parent 42fca50a
......@@ -72,6 +72,7 @@ EXPORTS = \
${HDRDIR}.FileTypes \
${HDRDIR}.FSNumbers \
${HDRDIR}.GraphicsV \
${HDRDIR}.HALSize.<HALSize> \
${HDRDIR}.Heap \
${HDRDIR}.ImageSize.<ImageSize> \
${HDRDIR}.IO.GenericIO \
......@@ -162,6 +163,7 @@ Dirs:
${MKDIR} ${HDRDIR}.APCS
${MKDIR} ${HDRDIR}.CPU
${MKDIR} ${HDRDIR}.FDC
${MKDIR} ${HDRDIR}.HALSize
${MKDIR} ${HDRDIR}.IO
${MKDIR} ${HDRDIR}.ImageSize
${MKDIR} ${HDRDIR}.Machine
......@@ -199,9 +201,10 @@ ${INSTDIR}.Hdr.ListOpts: hdr.ListOpts; ${CP} hdr.ListOpts $@ ${CP
# Special rule for exporting all ImageSize, Machine and UserIF files.
# Trigger by invoking the export with OPTIONS=ALL.
#
ALL: ${HDRDIR}.Machine.Machine ${HDRDIR}.UserIF.UserIF ${HDRDIR}.ImageSize.<ImageSize> ${HDRDIR}.APCS.<APCS>
ALL: ${HDRDIR}.Machine.Machine ${HDRDIR}.UserIF.UserIF ${HDRDIR}.HALSize.<HALSize> ${HDRDIR}.ImageSize.<ImageSize> ${HDRDIR}.APCS.<APCS>
${CP} hdr.Machine ${HDRDIR}.Machine ${CPFLAGS}
${CP} hdr.UserIF ${HDRDIR}.UserIF ${CPFLAGS}
${CP} hdr.HALSize ${HDRDIR}.HALSize ${CPFLAGS}
${CP} hdr.ImageSize ${HDRDIR}.ImageSize ${CPFLAGS}
${CP} hdr.APCS ${HDRDIR}.APCS ${CPFLAGS}
......@@ -280,6 +283,7 @@ ${HDIR}.Global.h.IOCtl: h.IOCtl; ${CP} h.IOCtl
# Machine/UI/hardware specific headers:
${HDRDIR}.Machine.<Machine>: hdr.Machine.<Machine>; ${CP} hdr.Machine.<Machine> $@ ${CPFLAGS}
${HDRDIR}.Machine.Machine: hdr.Machine.Machine; ${CP} hdr.Machine.Machine $@ ${CPFLAGS}
${HDRDIR}.HALSize.<HALSize>: hdr.HALSize.<HALSize>; ${CP} hdr.HALSize.<HALSize> $@ ${CPFLAGS}
${HDRDIR}.ImageSize.<ImageSize>: hdr.ImageSize.<ImageSize>; ${CP} hdr.ImageSize.<ImageSize> $@ ${CPFLAGS}
${HDRDIR}.APCS.<APCS>: hdr.APCS.<APCS>; ${CP} hdr.APCS.<APCS> $@ ${CPFLAGS}
${HDRDIR}.APCS.Common: hdr.APCS.Common; ${CP} hdr.APCS.Common $@ ${CPFLAGS}
......
/* (1.80)
/* (1.81)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 1.80
#define Module_MajorVersion_CMHG 1.81
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 14 Apr 2011
#define Module_Date_CMHG 22 May 2011
#define Module_MajorVersion "1.80"
#define Module_Version 180
#define Module_MajorVersion "1.81"
#define Module_Version 181
#define Module_MinorVersion ""
#define Module_Date "14 Apr 2011"
#define Module_Date "22 May 2011"
#define Module_ApplicationDate "14-Apr-11"
#define Module_ApplicationDate "22-May-11"
#define Module_ComponentName "HdrSrc"
#define Module_ComponentPath "castle/RiscOS/Sources/Programmer/HdrSrc"
#define Module_FullVersion "1.80"
#define Module_HelpVersion "1.80 (14 Apr 2011)"
#define Module_LibraryVersionInfo "1:80"
#define Module_FullVersion "1.81"
#define Module_HelpVersion "1.81 (22 May 2011)"
#define Module_LibraryVersionInfo "1:81"
; Copyright 2011 Castle Technology Ltd
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
; http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;
; HAL Size definition for 128K HAL
OSROM_HALSize * 128*1024 ; HAL Size in bytes
END
; Copyright 2011 Castle Technology Ltd
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
; http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;
; HAL Size definition for 64K HAL
OSROM_HALSize * 64*1024 ; HAL Size in bytes
END
; Copyright 2011 Castle Technology Ltd
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
; http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;
; HAL Size definition for 96K HAL
OSROM_HALSize * 96*1024 ; HAL Size in bytes
END
......@@ -52,7 +52,7 @@ L2_SmallPage * 4_2 ; (extended) small page specifier in L2 entry
L2_ExtPage * L2_SmallPage
L1_TEXShift * 12
L1_TEX * 2_1111 :SHL: 12 ; Type Extension bits
L1_TEX * 2_111 :SHL: 12 ; Type Extension bits
L1_C * 1 :SHL: 3 ; cacheable
L1_B * 1 :SHL: 2 ; bufferable
L1_nG * 1 :SHL: 17 ; 1=entry associated with ASID, 0=global
......@@ -61,8 +61,8 @@ L1_X * 1 :SHL: 12 ; XScale - modifies meaning of C and B bits (is
L2L_TEXShift * 12 ; For large pages
L2_TEXShift * 6 ; For extended small pages
L2L_TEX * 2_1111 :SHL: 12 ; Type Extension bits (large pages)
L2_TEX * 2_1111 :SHL: 6 ; Type Extension bits (tiny and extended pages)
L2L_TEX * 2_111 :SHL: 12 ; Type Extension bits (large pages)
L2_TEX * 2_111 :SHL: 6 ; Type Extension bits (tiny and extended pages)
L2_C * 1 :SHL: 3 ; cacheable bit in level 2 entry
L2_B * 1 :SHL: 2 ; bufferable --------""----------
L2_nG * 1 :SHL: 11 ; 1=entry associated with ASID, 0=global
......
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