GitLab has been upgraded to 13.3.6. If you encounter any issues mail code@riscosopen.org

Commit 1cde1fc1 authored by ROOL's avatar ROOL 🤖

Resync with allocations database

Error allocations, including retrospective allocations for some errors used
in RISC OS 6.

Version 2.88. Tagged as 'HdrSrc-2_88'
parent 70ecd689
/* (2.87)
/* (2.88)
*
* This file is automatically maintained by srccommit, do not edit manually.
*
*/
#define Module_MajorVersion_CMHG 2.87
#define Module_MajorVersion_CMHG 2.88
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 23 Jan 2020
#define Module_Date_CMHG 25 Feb 2020
#define Module_MajorVersion "2.87"
#define Module_Version 287
#define Module_MajorVersion "2.88"
#define Module_Version 288
#define Module_MinorVersion ""
#define Module_Date "23 Jan 2020"
#define Module_Date "25 Feb 2020"
#define Module_ApplicationDate "23-Jan-20"
#define Module_ApplicationDate "25-Feb-20"
#define Module_ComponentName "HdrSrc"
#define Module_FullVersion "2.87"
#define Module_HelpVersion "2.87 (23 Jan 2020)"
#define Module_LibraryVersionInfo "2:87"
#define Module_FullVersion "2.88"
#define Module_HelpVersion "2.88 (25 Feb 2020)"
#define Module_LibraryVersionInfo "2:88"
......@@ -204,6 +204,7 @@ OldOpt SETA {OPT}
AddError NeedMod, "Module %0 cannot start without module %1"
AddError2 RMNot32bit, "RMNot32bit:Module is not 32-bit compatible", ErrorNumber_BadRMHeaderField
AddError BadErrPtr, "BadErrPtr:SWI &%0 returned a bad error pointer"
AddError RMAlignment, "RMAlignment:Bad alignment request"
; Variables errors
......@@ -1321,6 +1322,7 @@ ErrorBase_AbortRegions # &100 ; &80000500
; was written that acted upon the error numbers, so now we make the symbol
; resolve to the same number that was always documented.
ErrorBase_VectorFloatingPoint # &100 ; &80000600
ErrorBase_Pyromaniac # &100 ; &80000700
^ ErrorBase_MachineExceptions
AddError UndefinedInstruction, "UndefinedInstruction:Undefined instruction at &%0"
......@@ -1329,6 +1331,9 @@ ErrorBase_VectorFloatingPoint # &100 ; &80000600
AddError AddressException, "AddressException:Address exception at &%0"
AddError UnknownIRQ, "Unknown IRQ at &"
AddError BranchThrough0, "BranchThrough0:Branch through zero at &"
AddError BTSCorruption, "BTSCorruption:Privileged mode stack corruption or imbalance detected at &%0" ; RISC OS 6
AddError SVCStackOverflow, "SVCStackOverflow:Privileged mode stack overflow at &%0" ; RISC OS 6
AddError SVCStackCorrupt, "SVCStackCorrupt:Privileged mode stack pointer corruption at &%0" ; RISC OS 6
^ ErrorBase_EconetExceptions
AddError Remoted, "Remoted"
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment