GitLab

Detail:
  * LD macro updated to know about LDRH and LDRD instructions
  * LDW macro updated: safe to use on last word of a page; no longer enforces
    relative order of temporary registers; uses unaligned loads when possible;
    uses 1 fewer instructions if ARMv6 compatibility is not required;
    scheduled for XScale and Cortex-A8
Admin:
  Tested with BASIC softload on RISC OS 5.12 Iyonix.
  Fixes bug #220


Version 1.72. Tagged as 'HdrSrc-1_72'