GitLab

Update atomic_process_smp to cope with the possibility of the process function altering the state of the exclusive monitor. Prefer CPS over MSR when performing PSR manipulation.

Detail:
  s/atomic - Since the exclusive monitor can have its state affected by almost anything, atomic_process_smp can't assume that the state remains stable across the call to the user's process function. Instead we must perform our LDREX-STREX sequence after the callback, manually checking that the value being updated hasn't been altered by anyone else while the process function was executing.
  s/spin, s/spinrw - When disabling interrupts prefer CPS over MSR. Apart from making the sequences one instruction shorter, CPS generally delivers better performance than the equivalent MSR.
Admin:
  Tested on Cortex-A15


Version 0.03. Tagged as 'SyncLib-0_03'

Detail:
  atomic_update_byte() is the equivalent of atomic_update() but deals with
  byte-wide rather than word-wide data fields. It operates using either
  SWPB or LDREXB/STREXB instructions, depending upon the architecture, and
  is therefore suitable for updating any modules which currently use SWPB
  explicitly in order to make them compatible with ARMv8 where the SWPB
  instruction has been removed.
Admin:
  Tested on Raspberry Pi 3.

Version 0.02. Tagged as 'SyncLib-0_02'

Detail:
  SyncLib is a library containing architecture-independent synchronisation
  primitives. It supports uniprocessor and SMP systems, even though RISC OS
  itself does not (yet) support SMP - but it allows individual modules to
  start to be modified in preparation for any such future support. The
  library adjusts itself according to the architecture targeted by your
  chosen build, so in particular when used in ROM builds, only supported for
  the appropriate CPU(s) will be included.
Admin:
  SyncLib is used heavily by SDIODriver and SDFS - they have acted as a test
  bed for the library and also as a proof of concept for SMP-ready modules.