Commit 817137da authored by Robert Sprowson's avatar Robert Sprowson
Browse files

Allow No32bitCode=FALSE No26bitCode=FALSE to work

For disc targets the above condition is true, so things using AsmUtils in this situtation might be run on something with no MSR/MRS.
No32bitCode=TRUE with No26bitCode=TRUE remains invalid, but the 3 other combinations are now supported.
Binaries inspected by eye for 3 combinations.

Version 0.16. Tagged as 'AsmUtils-0_16'
parent ab5ddb80
/* (0.15)
/* (0.16)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.15
#define Module_MajorVersion_CMHG 0.16
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 01 Feb 2012
#define Module_Date_CMHG 16 Sep 2012
#define Module_MajorVersion "0.15"
#define Module_Version 15
#define Module_MajorVersion "0.16"
#define Module_Version 16
#define Module_MinorVersion ""
#define Module_Date "01 Feb 2012"
#define Module_Date "16 Sep 2012"
#define Module_ApplicationDate "01-Feb-12"
#define Module_ApplicationDate "16-Sep-12"
#define Module_ComponentName "AsmUtils"
#define Module_ComponentPath "castle/RiscOS/Sources/Lib/AsmUtils"
#define Module_FullVersion "0.15"
#define Module_HelpVersion "0.15 (01 Feb 2012)"
#define Module_LibraryVersionInfo "0:15"
#define Module_FullVersion "0.16"
#define Module_HelpVersion "0.16 (16 Sep 2012)"
#define Module_LibraryVersionInfo "0:16"
......@@ -17,8 +17,9 @@
;
; Enclosed is the source to the function usermode_donothing. This drops you
; into user mode, does an OS_Byte 0,1 and then returns to supervisor mode.
; As the OS returns from the OS_Byte call callbacks are collected.
; into user mode, does an OS_LeaveOS (or OS_Byte 0,1 if that SWI is absent)
; and then returns to supervisor mode.
; On returns from the SWI called in user mode, callbacks are collected.
; Pre-condition: processor is in SVC26 or SVC32 mode
; Post-condition: processor is in same mode as on entry
......@@ -55,22 +56,43 @@ CollectCallbacks
user_mode_donothing
]
usermode_donothing
FunctionEntry
[ No32bitCode
Push "lr"
[ :LNOT: (No32bitCode :LOR: No26bitCode)
; 32 or 26 bit selected at run time
; The 26 bit case preserves flags, so works with APCS-R (and APCS-32)
TEQ pc, pc
TEQNEP pc, #0 ; Set USR mode, IRQs and FIQs enabled
MRSEQ r3, CPSR ; Get current PSR
BICEQ r3, r3, #I32_bit :OR: F32_bit :OR: 2_1111
MSREQ CPSR_c, r3 ; Set USR26/USR32 mode, IRQs and FIQs enabled
|
[ :LNOT: No26bitCode
TEQP pc, #0 ; Set USR mode, IRQs and FIQs enabled
|
]
[ :LNOT: No32bitCode
MRS r3, CPSR ; Get current PSR
BIC r3, r3, #I32_bit :OR: F32_bit :OR: 2_1111
MSR CPSR_c, r3 ; Set USR26/USR32 mode, IRQs and FIQs enabled
]
]
]
SWI XOS_LeaveOS ; SWI call from USR mode with interrupts enabled triggers callbacks
MOVVS r0, #0
MOVVS r1, #1
SWIVS XOS_Byte ; No 'OS_LeaveOS', do this instead (slower)
SWI XOS_EnterOS ; Re-enter SVC26/SVC32 mode
[ No32bitCode
NOP
]
Return
[ :LNOT: (No32bitCode :LOR: No26bitCode)
; 32 or 26 bit selected at run time
; The 26 bit case preserves flags, so works with APCS-R (and APCS-32)
TEQ pc, pc
Pull "pc",NE,^
Pull "pc"
|
[ :LNOT: No26bitCode
Pull "pc",,^
]
[ :LNOT: No32bitCode
Pull "pc"
]
]
END
......@@ -19,10 +19,8 @@
;
; See irqs.h for interface details
;
; NOTE 1: Counter-intuitively, irqs_on matches restore_irqs and NOT
; ensure_irqs_on.
;
; NOTE 2: This code prefers to use 32-bit code where possible.
; NOTE: Counter-intuitively, irqs_on matches restore_irqs and NOT
; ensure_irqs_on.
;
GET Hdr:ListOpts
......@@ -37,54 +35,82 @@
EXPORT ensure_irqs_on
EXPORT restore_irqs
GBLS cond
AREA |AsmUtils$irqs$$Code|, CODE, READONLY, PIC
; ensure_irqs_off/ irqs_off: Disable IRQs, returning a value
; suitable for passing to restore_irqs/irqs_on.
ensure_irqs_off
irqs_off
[ No26bitCode :LOR: :LNOT: No32bitCode
[ :LNOT: (No32bitCode :LOR: No26bitCode)
; 32 or 26 bit selected at run time
; The 26 bit case preserves flags, so works with APCS-R (and APCS-32)
TEQ pc, pc
cond SETS "NE"
|
cond SETS "AL"
]
[ :LNOT: No26bitCode
AND$cond r0, lr, #I_bit
ORR$cond.S pc, lr, #I_bit
]
[ :LNOT: No32bitCode
MRS r0, CPSR
ORR r1, r0, #I32_bit ; set IRQs
TEQ r0, r1 ; any change?
MSRNE CPSR_c, r1 ; disable IRQs if enabled before
AND r0, r0, #I32_bit ; return previous state of bit
Return ,LinkNotStacked
|
AND r0, lr, # I_bit
ORRS pc, lr, # I_bit
]
]
; restore_irqs/irqs_on: Re-enable IRQs if they were enabled prior to
; the earlier call to ensure_irqs_off/ensure_irqs_on/irqs_off
restore_irqs
irqs_on
[ No26bitCode :LOR: :LNOT: No32bitCode
[ :LNOT: (No32bitCode :LOR: No26bitCode)
; 32 or 26 bit selected at run time
; The 26 bit case preserves flags, so works with APCS-R (and APCS-32)
TEQ pc, pc
cond SETS "NE"
|
cond SETS "AL"
]
[ :LNOT: No26bitCode
BIC$cond lr, lr, #I_bit
ORR$cond.S pc, lr, r0
]
[ :LNOT: No32bitCode
MRS r1, CPSR ; obtain current PSR
BIC r2, r1, #I32_bit ; clear IRQ bit
ORR r2, r2, r0 ; restore state from parameter
TEQ r1, r2 ; changed?
MSRNE CPSR_c, r2 ; update PSR if it has changed
Return ,LinkNotStacked
|
BIC lr, lr, # I_bit
ORRS pc, lr, r0
]
]
; ensure_irqs_on: Enable IRQs, returning a value
; suitable for passing to restore_irqs/irqs_on
ensure_irqs_on
[ No26bitCode :LOR: :LNOT: No32bitCode
[ :LNOT: (No32bitCode :LOR: No26bitCode)
; 32 or 26 bit selected at run time
; The 26 bit case preserves flags, so works with APCS-R (and APCS-32)
TEQ pc, pc
cond SETS "NE"
|
cond SETS "AL"
]
[ :LNOT: No26bitCode
AND$cond r0, lr, #I_bit
BIC$cond.S pc, lr, #I_bit
]
[ :LNOT: No32bitCode
MRS r0, CPSR
BIC r1, r0, #I32_bit ; enable IRQs
TEQ r0, r1 ; any change?
MSRNE CPSR_c, r1 ; enable IRQs if disabled before
AND r0, r0, #I32_bit ; return previous state of bit
Return ,LinkNotStacked
|
AND r0, lr, # I_bit
BICS pc, lr, # I_bit
]
]
END
......@@ -72,7 +72,7 @@ modulefp_enable
Return ,LinkNotStacked
; Once finished with floatng point code, you MUST call this function to
; Once finished with floating point code, you MUST call this function to
; restore the previous state of the system.
; extern void modulefp_disable(modulefp_buf * regs);
......
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