; Copyright 2000 Pace Micro Technology plc
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
;     http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;

ARMv3   *       0
ARMv4   *       1
ARMv4T  *       2
ARMv5   *       3
ARMv5T  *       4
ARMv5TE *       5

                ^       0
ARM600          #       1
ARM610          #       1
ARM700          #       1
ARM710          #       1
ARM710a         #       1
SA110_preRevT   #       1
SA110           #       1
ARM7500         #       1
ARM7500FE       #       1
SA1100          #       1
SA1110          #       1
ARM720T         #       1
ARM920T         #       1
ARM922T         #       1
X80200          #       1
ARMunk          *       255

CPUFlag_BaseRestored            * 1:SHL:0
CPUFlag_StorePCplus8            * 1:SHL:1
CPUFlag_No26bitMode             * 1:SHL:8
CPUFlag_VectorReadException     * 1:SHL:9
CPUFlag_SplitCache              * 1:SHL:10
CPUFlag_NoWBDrain               * 1:SHL:11
CPUFlag_AbortRestartBroken      * 1:SHL:12

; The macro to do an ARM operation. All ARM operations are expected
; to corrupt a1 only
; This macro corrupts ip unless $zero reg is supplied

        MACRO
        ARMop   $op, $cond, $tailcall, $zero
 [ "$zero" = ""
        MOV$cond ip, #ZeroPage
 ]
 [ "$tailcall" = ""
        MOV$cond lr, pc
 ]
 [ "$zero" = ""
        LDR$cond pc, [ip, #Proc_$op]
 |
        LDR$cond pc, [$zero, #Proc_$op]
 ]
        MEND

        END