Features Bit 0: FIFOs available int ReceiveByte(int port, int *status) Returns the next byte from the FIFO (if enabled) or the holding register. If status is non-NULL, the line status associated with the byte is read (see LineStatus). The return value is only meaningful if a received byte is available (bit 0 of *status will be set). void TransmitByte(int port, int byte) int LineStatus(int port) Bit 0: Receiver Data Ready Bit 1: Overrun Error Bit 2: Parity Error Bit 3: Framing Error Bit 4: Break Error Bit 5: Transmitter Holding Register Empty Bit 6: Transmitter Empty (including FIFO) Bit 7: FIFO contains a Parity, Framing or Break error Parity, Framing and Break errors are associated with each byte received. Whether the values reported here are associated with the last byte read using ReceiveByte or with the next byte to be read is undefined. You should request the status using ReceiveByte to ensure accurate identification of bytes with errors. Error bits are cleared whenever status is read, using either LineStatus or ReceiveByte with status non-NULL. int InterruptEnable(int port, int eor, int mask) Enables interrupts. Bits are: Bit 0: Received Data Available (and Character Timeout) Bit 1: Transmitter Holding Register Empty Bit 2: Received Line Status Bit 3: Modem Status Returns previous state. int Rate(int port, int baud16) Sets the rate, in units of 1/16 of a baud. Returns the previous rate. Use -1 to read. int Format(int port, int format) Bits 0-1: Bits per word 0=>5, 1=>6, 2=>7, 3=>8 Bit 2: Stop length 0=>1, 1=>2 (1.5 if 5 bits) Bit 3: Parity enabled Bits 4-5: Parity: 0 => Odd (or disabled) 1 => Even 2 => Mark (parity bit = 1) 3 => Space (parity bit = 0) Returns previous format. -1 to read. void FIFOSize(int *rx, int *tx) Returns the size of the RX and TX FIFOs. Either parameter may be NULL. Note that the size of the TX FIFO is the total amount of data that can be sent immediately when the Transmitter Holding Register Empty status holds. (So an unusual UART that had a transmit threshold should return total FIFO size minus threshold). void FIFOClear(int port, int flags) Clears the input FIFO (if bit 0 set) and the output FIFO (if bit 1 set). int FIFOEnable(int port, int enable) Enables or disables the RX and TX FIFOs: 0 => disable, 1 => enable -1 => read status. Returns previous status. int FIFOThreshold(int port, int threshold) Sets the receive threshold level for the FIFO RX interrupt. Normally available values are 1,4,8 and 14 bytes. Returns previous value. -1 to read. int InterruptID(int port) Returns the highest priority interrupt currently asserted. In order of priority: 3 => Receiver Line Status (Cleared by ReceiveByte/LineStatus) 2 => Received Data Available (Cleared by reading enough data) 6 => Character Timeout (received data waiting) 1 => Transmitter Holding Register Empty (Cleared by this call) 0 => Modem Status (Cleared by ModemStatus) -1 => No Interrupt The Modem Status interrupt occurs when the CTS, DSR or DCD inputs change, or when RI goes from high to low (ie bits 0 to 3 of ModemStatus are set). int Break(int port, int enable) Activates (1) or deactivates (0) a break condition. -1 to read, returns previous state. int ModemControl(int port, int eor, int mask) Modifies the modem control outputs. Bit 0: DTR Bit 1: RTS Note that these are logical outputs, although the physical pins may be inverted. So 1 indicates a request to send. int ModemStatus(int port) Reads the modem status inputs. Bit 0: CTS changed since last call Bit 1: DSR changed since last call Bit 2: RI changed from high to low since last call Bit 3: DCD changed since last call Bit 4: CTS Bit 5: DSR Bit 6: RI Bit 7: DCD Note that these are logical inputs, although the physical pins may be inverted. So 1 indicates a Clear To Send condition. int Device(int port)