; Copyright 2015 Castle Technology Ltd
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
;     http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;

; Register layout of the PL310 L2 cache controller

        GET     hdr:HALDevice

OldOpt  SETA    {OPT}
        OPT     OptNoList+OptNoP1List

PL310_REG0_CACHE_ID              * &000
PL310_REG0_CACHE_TYPE            * &004
PL310_REG1_CONTROL               * &100
PL310_REG1_AUX_CONTROL           * &104
PL310_REG1_TAG_RAM_CONTROL       * &108
PL310_REG1_DATA_RAM_CONTROL      * &10C
PL310_REG2_EV_COUNTER_CTRL       * &200
PL310_REG2_EV_COUNTER1_CFG       * &204
PL310_REG2_EV_COUNTER0_CFG       * &208
PL310_REG2_EV_COUNTER1           * &20C
PL310_REG2_EV_COUNTER0           * &210
PL310_REG2_INT_MASK              * &214
PL310_REG2_INT_MASK_STATUS       * &218
PL310_REG2_INT_RAW_STATUS        * &21C
PL310_REG2_INT_CLEAR             * &220
PL310_REG7_CACHE_SYNC            * &730
PL310_REG7_CACHE_SYNC_753970     * &740 ; Alternate location suggested in errata 753970 workaround
PL310_REG7_INV_PA                * &770
PL310_REG7_INV_WAY               * &77C
PL310_REG7_CLEAN_PA              * &7B0
PL310_REG7_CLEAN_INDEX           * &7B8
PL310_REG7_CLEAN_WAY             * &7BC
PL310_REG7_CLEAN_INV_PA          * &7F0
PL310_REG7_CLEAN_INV_INDEX       * &7F8
PL310_REG7_CLEAN_INV_WAY         * &7FC
PL310_REG9_D_LOCKDOWN0           * &900
PL310_REG9_I_LOCKDOWN0           * &904
PL310_REG9_D_LOCKDOWN1           * &908
PL310_REG9_I_LOCKDOWN1           * &90C
PL310_REG9_D_LOCKDOWN2           * &910
PL310_REG9_I_LOCKDOWN2           * &914
PL310_REG9_D_LOCKDOWN3           * &918
PL310_REG9_I_LOCKDOWN3           * &91C
PL310_REG9_D_LOCKDOWN4           * &920
PL310_REG9_I_LOCKDOWN4           * &924
PL310_REG9_D_LOCKDOWN5           * &928
PL310_REG9_I_LOCKDOWN5           * &92C
PL310_REG9_D_LOCKDOWN6           * &930
PL310_REG9_I_LOCKDOWN6           * &934
PL310_REG9_D_LOCKDOWN7           * &938
PL310_REG9_I_LOCKDOWN7           * &93C
PL310_REG9_LOCK_LINE_EN          * &950
PL310_REG9_UNLOCK_WAY            * &954
PL310_REG12_ADDR_FILTERING_START * &C00
PL310_REG12_ADDR_FILTERING_END   * &C04
PL310_REG15_DEBUG_CTRL           * &F40
PL310_REG15_PREFETCH_CTRL        * &F60
PL310_REG15_POWER_CTRL           * &F80

; PL310 revisions (low 5 bits of CACHE_ID)

PL310_R0P0         * 0
PL310_R1P0         * 2
PL310_R2P0         * 4
PL310_R3P0         * 5
PL310_R3P1         * 6
PL310_R3P1_50REL0  * 7
PL310_R3P2         * 8
PL310_R3P3         * 9

        OPT     OldOpt
        END