; > TestSrc.IOC

        TTL RISC OS 2+ POST IO controller
;
; This initial IOC test simply reports the content of the IRQ and FIRQ
; registers, to show any unexpected pending IRQs. 
; Certain of these should really be cleared, and the effect of an
; interrupt tested.
;
;------------------------------------------------------------------------
; History
;
; Date          Name            Comment
; ----          ----            -------
; 18-Dec-89     ArtG            Initial version
; 29-Nov-91     ArtG            Added IOC bus test using mask registers
; 20-Jun-93     ArtG            Modified for 29-bit IOMD test
;
;
;------------------------------------------------------------------------

        [ IO_Type = "IOMD"
ts_IObase       *       IOMD_Base
ts_IOmask       *       &1fffffff
ts_IOreg1       *       IOMD_VIDCUR
ts_IOreg2       *       IOMD_VIDSTART
ts_IObswap      *       32
ts_IOMD_ID      *       &D4E7
        |
ts_IObase       *       IOC
ts_IOmask       *       &ff0000
ts_IOreg1       *       IOCIRQMSKA
ts_IOreg2       *       IOCIRQMSKB
ts_IObswap      *       16
        ]

ts_IOCreg
        MOV     r0,#0                   ; zero error accumulator
        LDR     r3, =ts_IObase
        MOV     r1,#(1 :SHL: 31)          ; initialise bit-set test mask
0
        MVN     r2,r1                   ; make bit-clear test mask
        ANDS    r4,r1,#ts_IOmask
        BEQ     %FT1                    ; skip if this bit isn't tested
        STR     r1,[r3,#ts_IOreg1]
        STR     r2,[r3,#ts_IOreg2]
        LDR     r4,[r3,#ts_IOreg1]
;        EOR     r4, r4, r1, LSR #ts_IObswap     ; check bit-set test was OK
        EOR     r4, r4, r1           ; check bit-set test was OK
        ORR     r0, r0, r4              ; accumulate errors in r0
        LDR     r4,[r3,#ts_IOreg2]
;        EOR     r4, r4, r2, LSR #ts_IObswap     ; check bit-clear test was OK
        EOR     r4, r4, r2           ; check bit-clear test was OK
        ORR     r0, r0, r4              ; accumulate errors in r0
1
        MOV     r1, r1, LSR #1          ; shift mask downwards
        TEQ     r1,#0
        BNE     %BT0                    ; and loop until all bits tested

        ANDS    r8, r0, #ts_IOmask
        MOV     pc,r14                   ; return error if any bit failed

ts_IOCstat
        LDR     r3, =ts_IObase
        MOV     r0,#0
        [ IO_Type = "IOMD"
        LDRB    r1,[r3,#IOMD_ID1]
        ORR     r0,r0,r1, LSL #(32-24)
        LDRB    r1,[r3,#IOMD_ID0]
        ORR     r0,r0,r1
        LDR     r1,=ts_IOMD_ID
        CMPS    r0,r1                   ; check IOMD identity
        MOV     r0,r0,LSL #16
        LDRB    r1,[r3,#IOMD_VERSION]
        ORR     r8,r0,r1, LSL #12
        MOV     pc,r14
        |
        LDRB    r1,[r3,#IOCControl]
        ORR     r0,r0,r1, LSL #(32 - 8)
        LDRB    r1,[r3,#IOCIRQSTAA]
        ORR     r0,r0,r1, LSL #(32 - 16)
        LDRB    r1,[r3,#IOCIRQSTAB]
        ORR     r0,r0,r1, LSL #(32 - 24)
        LDRB    r1,[r3,#IOCFIQSTA]
        ORR     r8,r0,r1
        ANDS    r1,r1,#0                ; return zero flag (OK)

        MOV     pc,r14
        ]

        END