diff --git a/TestSrc/Begin b/TestSrc/Begin
index 0c360eef8f3d9ef2abb13073e3eb8fcf37ffd240..7ea144cc6e0fed8f1a8fbee915fd55adb42adc52 100644
--- a/TestSrc/Begin
+++ b/TestSrc/Begin
@@ -268,6 +268,7 @@ ts_himsg
= ("0" + (TS_CHANGES :MOD: 10))
= 0
+ ALIGN
;
; These vector tables permit access by the external (or downloaded) test
diff --git a/TestSrc/ExtIO b/TestSrc/ExtIO
index 2aec7cd51ac37aa36fb0e19ec17e8301f9161ce7..76c2db3173aabb025f6b2d971658caefe99ea5ac 100644
--- a/TestSrc/ExtIO
+++ b/TestSrc/ExtIO
@@ -53,6 +53,50 @@
;
+ MACRO
+ TestAdapterLocation $reg
+;
+; Load up the registers for the test interface communication.
+; On exit: R0 = 0
+; R1 corrupted
+; $reg -> zero word in 8-16MB space we can read to communicate with
+; test box
+
+; If the ROM is >8M, we will use the fixed zero word in the ROM trailer.
+; If not, we use the old scheme (in case someone is using an old ROM joiner
+; that doesn't write the correct trailer.) Because the ROM is >8M, the
+; trailer will be at an address with A23 set, as desired.
+;
+; KJB - note I haven't kept the purity of the minimal instruction set -
+; I feel that it is unlikely that there ever will be a processor test,
+; and if there is, then this won't be the only place where the purity
+; has been broken...
+
+ ASSERT ts_Alias_bits = 8*1024*1024
+
+ MOV r0,#0
+ LDR r1,[r0, #ts_ROMSIZE] ; size of ROM in bank 0
+ CMP r1,#8*1024*1024
+ SUBHI $reg,r1,#20 ; zero word is at end-20
+ BHI %FT05
+
+; Point r2 at a word which contains 0 in 0-8MB physical space.
+; Note that this code doesn't cope with the case where it can't find a zero
+; word anywhere in the whole ROM. I don't think that this is a problem.
+
+ MOV r0, #0 ; expected below
+ MOV $reg, #0 ; start of physical space
+01
+ LDR r1, [$reg, #4]!
+ TEQ r1, r0 ; is it zero?
+ BNE %BT01
+
+ ADD $reg, $reg, #ts_Alias_bits ; point to zero word in ghost
+05
+ MEND
+
+
+
;
; This section determines whether the test interface adapter exists, and
; what variety is fitted (dumb, display or external)
@@ -84,42 +128,9 @@ ts_GetCommand ROUT
ROUT
-;
-; Load up the registers for the test interface communication.
-;
-
-; If the ROM is >8M, we will use the fixed zero word in the ROM trailer.
-; If not, we use the old scheme (in case someone is using an old ROM joiner
-; that doesn't write the correct trailer.) Because the ROM is >8M, the
-; trailer will be at an address with A23 set, as desired.
-;
-; KJB - note I haven't kept the purity of the minimal instruction set -
-; I feel that it is unlikely that there ever will be a processor test,
-; and if there is, then this won't be the only place where the purity
-; has been broken...
-
- ASSERT ts_Alias_bits = 8*1024*1024
-
- MOV r0,#0
- LDR r1,[r0, #ts_ROMSIZE] ; size of ROM in bank 0
- CMP r1,#8*1024*1024
- SUBHI r2,r1,#20 ; zero word is at end-20
- BHI %42
-
-; Point r2 at a word which contains 0 in 0-8MB physical space.
-; Note that this code doesn't cope with the case where it can't find a zero
-; word anywhere in the whole ROM. I don't think that this is a problem.
-
- MOV r0, #0 ; expected below
- MOV r2, #0 ; start of physical space
-01
- LDR r1, [r2, #4]!
- TEQ r1, r0 ; is it zero?
- BNE %01
+ TestAdapterLocation r2 ; r0 = 0, r1 corrupted
- ADD r2, r2, #ts_Alias_bits ; point to zero word in ghost
-42
- MOV r1, #-1 ; expected below
+ MOV r1, #-1 ; expected below
04
; do an RD operation (four strobes) to ensure interface cleared
@@ -635,20 +646,7 @@ ts_PosText ROUT
;
ts_SendLCDCmd
-; Point r2 at a word which contains 0 in 0-8MB physical space.
-; If this word still reads as 0 when its ghost/alias is read from 8-16MB space
-; (A23 set) then we don't have a test box, otherwise we do.
-; Note that this code doesn't cope with the case where it can't find a zero
-; word anywhere in the whole ROM. I don't think that this is a problem.
-
- MOV r0, #0 ; ts_send_command_byte expects r0=0
- MOV r2, #0 ; start of physical space
-01
- LDR r1, [r2, #4]!
- TEQ r1, r0 ; is it zero?
- BNE %01
-
- ADD r2, r2, #ts_Alias_bits ; point to zero word in ghost
+ TestAdapterLocation r2 ; r0 = 0, r1 corrupted
04
; Wait - gap between successive WS attempts or successive bytes
diff --git a/VersionASM b/VersionASM
index 10f67e4cd4b2219495aa9a9049fbd7b90407aa6f..4d125dad80bb863aa2d414d6c06a5ba98f901b38 100644
--- a/VersionASM
+++ b/VersionASM
@@ -6,9 +6,9 @@
GBLS Module_MinorVersion
GBLS Module_Date
GBLS Module_FullVersion
-Module_MajorVersion SETS "4.77"
-Module_Version SETA 477
+Module_MajorVersion SETS "4.78"
+Module_Version SETA 478
Module_MinorVersion SETS ""
-Module_Date SETS "04 May 1999"
-Module_FullVersion SETS "4.77"
+Module_Date SETS "06 May 1999"
+Module_FullVersion SETS "4.78"
END
diff --git a/VersionNum b/VersionNum
index 7bac36ea6e8c47bce1217ea3df2fab3af4be0726..c3c024454ca026163b34f4b3614db7ce3e6bcc5e 100644
--- a/VersionNum
+++ b/VersionNum
@@ -1,15 +1,15 @@
-/* (4.77)
+/* (4.78)
*
* This file is automatically maintained by srccommit, do not edit manually.
*
*/
-#define Module_MajorVersion_CMHG 4.77
+#define Module_MajorVersion_CMHG 4.78
#define Module_MinorVersion_CMHG
-#define Module_Date_CMHG 04 May 1999
+#define Module_Date_CMHG 06 May 1999
-#define Module_MajorVersion "4.77"
-#define Module_Version 477
+#define Module_MajorVersion "4.78"
+#define Module_Version 478
#define Module_MinorVersion ""
-#define Module_Date "04 May 1999"
+#define Module_Date "06 May 1999"
-#define Module_FullVersion "4.77"
+#define Module_FullVersion "4.78"