Commit a7240617 authored by Jeffrey Lee's avatar Jeffrey Lee Committed by ROOL
Browse files

Ensure PhysIllegalMask is initialised correctly

Remove the lazy initialisation of PhysIllegalMask and instead manually
initialise it during MMU init. This fixes some situations where the lazy
initialisation doesn't work (PhysIllegalMask isn't in a zero-initialised
area of workspace, so if the HAL isn't doing a RAM clear then it could
be garbage)
parent 9099b4b9
......@@ -556,6 +556,7 @@ RISCOS_Start
; a2 = Total memory size (bytes)
; a3 = PhysRamTable
; v7 = After last used entry in PhysRamTable
; ip -> ZeroPage
; now store zeros to fill out table
......@@ -568,6 +569,9 @@ RISCOS_Start
STMLOIA v7!, {v3, v4}
BLO %BT57
; Calculate PhysIllegalMask before anything tries to use it
BL DeterminePhysIllegalMask
; Time to set up the L1PT. Just zero it out for now.
LDR a4, =DRAMOffset_L1PT+16*1024-(PhysRamTable+DRAMOffset_PageZero) ; offset from a3 to L1PT end
......@@ -1916,8 +1920,6 @@ AccessPhysicalAddress ROUT
LDR ip, =ZeroPage
Push "a1,v3,lr"
LDR v3, [ip, #PhysIllegalMask]
TEQ v3, #0
BLEQ DeterminePhysIllegalMask
TST a3, v3
BNE %FT90
; Use Get1MPTE to convert DA flags into L1PT section-mapping flags
......@@ -2345,8 +2347,6 @@ RISCOS_MapInIO_PTE ; a1 bits 0-19 = L1 section entry flags, bits 20+ = our extra
ADDS v1, a2, a4
ADC v2, a3, #0 ; v1,v2 = end physical address
LDR v3, [ip, #PhysIllegalMask]
TEQ v3, #0
BLEQ DeterminePhysIllegalMask
TST v2, v3
MOVNE a1, #0
BNE %FT90 ; can't map in physical addresses in this range
......
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