Commit afb354fd authored by Stuart Swales's avatar Stuart Swales Committed by ROOL
Browse files

Fix to fp32atan2 in certain special cases

Detail:
  fp32atan2 would give wrong results for special cases. For all of these
  the sign of x was copied onto the result (rather than the sign of y as
  intended); where both were ±INF a register with unknown value was used
  to determine whether to add ±pi/2.

Version 0.18. Tagged as 'VFPSupport-0_18'
parent c6391c0d
......@@ -9,12 +9,12 @@
GBLS Module_ApplicationDate
GBLS Module_HelpVersion
GBLS Module_ComponentName
Module_MajorVersion SETS "0.17"
Module_Version SETA 17
Module_MajorVersion SETS "0.18"
Module_Version SETA 18
Module_MinorVersion SETS ""
Module_Date SETS "03 Nov 2021"
Module_ApplicationDate SETS "03-Nov-21"
Module_Date SETS "24 Nov 2021"
Module_ApplicationDate SETS "24-Nov-21"
Module_ComponentName SETS "VFPSupport"
Module_FullVersion SETS "0.17"
Module_HelpVersion SETS "0.17 (03 Nov 2021)"
Module_FullVersion SETS "0.18"
Module_HelpVersion SETS "0.18 (24 Nov 2021)"
END
/* (0.17)
/* (0.18)
*
* This file is automatically maintained by srccommit, do not edit manually.
*
*/
#define Module_MajorVersion_CMHG 0.17
#define Module_MajorVersion_CMHG 0.18
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 03 Nov 2021
#define Module_Date_CMHG 24 Nov 2021
#define Module_MajorVersion "0.17"
#define Module_Version 17
#define Module_MajorVersion "0.18"
#define Module_Version 18
#define Module_MinorVersion ""
#define Module_Date "03 Nov 2021"
#define Module_Date "24 Nov 2021"
#define Module_ApplicationDate "03-Nov-21"
#define Module_ApplicationDate "24-Nov-21"
#define Module_ComponentName "VFPSupport"
#define Module_FullVersion "0.17"
#define Module_HelpVersion "0.17 (03 Nov 2021)"
#define Module_LibraryVersionInfo "0:17"
#define Module_FullVersion "0.18"
#define Module_HelpVersion "0.18 (24 Nov 2021)"
#define Module_LibraryVersionInfo "0:18"
......@@ -366,13 +366,13 @@ fp32atan2
BNE %FT50 ; atan2(INF, not 0 not NAN not INF) = pi/2
; y & x = INF
TST a4, #1:SHL:31
TST a2, #1:SHL:31
VLDR d0, dpiby4 ; atan2(INF, +INF) = pi/4
VLDR d1, dpiby2
VADDNE.F64 d0, d0, d1 ; atan2(INF, -INF) = 3*pi/4
50
; Copy sign of y
TST a2, #1:SHL:31
TST a1, #1:SHL:31
VNEGNE.F64 d0, d0
VCVT.F32.F64 s0, d0
Pull "v1, pc"
......
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