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Commit cc05c77a authored by Jeffrey Lee's avatar Jeffrey Lee

Don't pretend to mess with cacheability of pages

Detail:
  c/port - Fix vtophys requesting that pages are made uncacheable. They're already uncacheable (all allocated via PCI_RAMAlloc), and once we're done with the pages we never do a 'make cacheable' call to balance it out
Admin:
  Tested on Pi 2B


Version 0.25. Tagged as 'DWCDriver-0_25'
parent 49ab6570
/* (0.24)
/* (0.25)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.24
#define Module_MajorVersion_CMHG 0.25
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 11 Dec 2015
#define Module_Date_CMHG 27 Mar 2016
#define Module_MajorVersion "0.24"
#define Module_Version 24
#define Module_MajorVersion "0.25"
#define Module_Version 25
#define Module_MinorVersion ""
#define Module_Date "11 Dec 2015"
#define Module_Date "27 Mar 2016"
#define Module_ApplicationDate "11-Dec-15"
#define Module_ApplicationDate "27-Mar-16"
#define Module_ComponentName "DWCDriver"
#define Module_ComponentPath "mixed/RiscOS/Sources/HWSupport/USB/Controllers/DWCDriver"
#define Module_FullVersion "0.24"
#define Module_HelpVersion "0.24 (11 Dec 2015)"
#define Module_LibraryVersionInfo "0:24"
#define Module_FullVersion "0.25"
#define Module_HelpVersion "0.25 (27 Mar 2016)"
#define Module_LibraryVersionInfo "0:25"
......@@ -101,7 +101,7 @@ void* vtophys (void** v)
void* physical;
} block;
block.logical = v;
_swix (OS_Memory, _INR (0, 2), (1<<9) + (1<<13) + (2<<14), &block, 1);
_swix (OS_Memory, _INR (0, 2), (1<<9) + (1<<13), &block, 1);
return block.physical;
#else
......
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