1. 19 Jun, 2021 1 commit
    • Ben Avison's avatar
      Adapt to different `C_EXP_HDR` settings · c804009d
      Ben Avison authored
      An upcoming change to BuildSys adjusts the default setting of `C_EXP_HDR` so
      that it doesn't include a trailing `.h` for native builds. Since we use the
      value of this variable in one of our rules, adapt accordingly (note that this
      implementation will work with both old and new BuildSys).
      Version 0.16. Not tagged
  2. 10 Aug, 2019 2 commits
  3. 15 Jul, 2019 4 commits
    • John Ballance's avatar
      Be more selective searching for a suitable HALDevice · 029f88ff
      John Ballance authored
      Version 0.15. Tagged as 'SDIODriver-0_15'
    • John Ballance's avatar
      Add SoftHALDevice memory request routines · b9a53cb6
      John Ballance authored
    • John Ballance's avatar
      Add Debug switch · 380a68b1
      John Ballance authored
    • Ben Avison's avatar
      Add support for "soft" HAL devices · e4dac9c4
      Ben Avison authored
      These are identified by a different value in the major version field, and are
      intended for SD controllers that implement a register set that does not follow
      the SDHCI standard. All interaction with the controller is performed via
      function calls into such a HAL device, and a few of these are new.
      A couple of other changes that were made in passing:
      * device_added() now calls set_activity() and thereby avoids a branch through
        zero if a device indicates that the SDHCI host_control1 register should be
        used for setting the activity indicator.
      * HAL device deactivate entry is now called before OS_ReleaseDeviceVector so
        that it can be used to mask interrupts in the host controller. Since no
        current versions of the module use interrupts, this is a safe change.
  4. 02 Jul, 2019 4 commits
    • Ben Avison's avatar
      Refactor op_poll() · f8020baf
      Ben Avison authored
      This is now split into an outer function that does locking, iterates over
      the operation list and interacts with the OS and SDIODriver's clients, and
      an inner function op_poll_sdhci() which codifies the wait states of a
      standards-compliant SDHCI controller and does the register bashing. This
      internal API is now pretty close to what is required for a soft controller.
    • Ben Avison's avatar
      Reorganise state variables internal to op_poll into separate struct · ee0da4a0
      Ben Avison authored
      Three members of sdioop_t are particularly closely tied to the state machine
      for SDHCI controllers, and so are likely to differ for soft controllers.
      Create sdhci_op_t to hold these, and introduce a variable-length array member
      at end of sdioop_t to hold it. Allocate sdioop_t more dyamically in
      preparation for soft controllers.
    • Ben Avison's avatar
      Expose sdhci_op_state_t struct · edb3cf2d
      Ben Avison authored
      This is made up of 11 former members of sdioop_t. These will become part
      of the new "soft" controller API, so refactor the code to expose them as
      a new struct type, and use that internally.
    • Ben Avison's avatar
      Rename internal types/variables to reflect coming support for non-SDHCI controllers · 801c9eb3
      Ben Avison authored
      A lot of state doesn't actually care whether a controller's register layout
      follows the SDHCI standard or not. To reduce future confusion, most internal
      types and pointer variables are hereby renamed from 'sdhci' to a more generic
      'ctrl', short for 'controller'. Exceptions are sdhci_regset_t and
      sdhci_writebuffer_t, which are intimately tied to register accesses.
      Public data types and definitions (and the names of the exported header files)
      retain the original names, for the sake of not breaking all the other
      components that rely on them.
  5. 24 Jun, 2019 1 commit
  6. 17 Jan, 2018 1 commit
  7. 17 Jan, 2017 1 commit
    • Robert Sprowson's avatar
      Fix for NULL pointer dereference · 61e424b0
      Robert Sprowson authored
      When COMMAND_DATA doesn't return an error, SDIODriver was still trying to check the error number in the error block, causing an abort.
      Fixes problem spotted by Chris Hall on Pi Compute with its unusual eMMC chip.
      Version 0.13. Tagged as 'SDIODriver-0_13'
  8. 20 May, 2015 1 commit
    • Robert Sprowson's avatar
      Correction to register offset · b9a67dab
      Robert Sprowson authored
      Looks like a factor of 2 the wrong way 14<-28->56, though SDIODriver doesn't actually use those high up registers fortunately.
      Not tested, given that fact, but matches the comments now.
      Version 0.12. Tagged as 'SDIODriver-0_12'
  9. 02 Feb, 2015 1 commit
    • Ben Avison's avatar
      Add Raspberry Pi Compute module support · 9bb231f4
      Ben Avison authored
        This is the first board supported by RISC OS that has an eMMC chip. This
        is a non-removable flash memory device which obeys a recent revision of
        the MMC bus protocol, which has many similarities with the SD bus.
        * Flags added to low-level and high-level APIs to identify the device as
          a hard drive under SDFS (affects the media search algorithms).
        * For a sector-addressed MMC device (over 2 GB), CMD1 needs HCS set in
          the command or it won't respond.
        * The MMC device needed to be selected when reading the EXT_CSD (which is
          only present in sector-addressed MMC cards).
        * Added the generic SDHCI fallback versions of some HAL device routines.
        Tested on a Compute module (of course).
      Version 0.11. Tagged as 'SDIODriver-0_11'
  10. 05 Nov, 2014 1 commit
    • Ben Avison's avatar
      Tweak to SDHCI device API extension from version 0.09 · 56308f72
      Ben Avison authored
        Before this version gets too widely used in the wild, I'm taking the
        opportunity to correct the new call so that it takes the slot parameter
        like all the other calls do.
      Version 0.10. Tagged as 'SDIODriver-0_10'
  11. 31 Oct, 2014 1 commit
    • Ben Avison's avatar
      Miscellaneous improvements · 208f5654
      Ben Avison authored
        * Important data loss bug rectified: the retry mechanism inadvertently
          failed to pass back over data that had been transmitted to the card but
          not written successfully, instead picking up afterwards and swallowing
          the error. Therefore, only repeatable errors such as card timeouts were
          being reported correctly, and user data could be lost with no indication
          until it failed to read back correctly.
        * Supports controllers with the following quirks:
          1) Error bit in interrupt status register not implemented
          2) Non-standard method of triggering SD bus command
        * Reports non-standard error number 12 reported by some controllers
        * Checks for a major version match on SDHCI HAL devices before using them
          (should have been doing this all along, but fortunately there are no
          plans for incompatible changes that would force a major version change
          in the forseeable future).
      Version 0.09. Tagged as 'SDIODriver-0_09'
  12. 14 Jul, 2014 1 commit
    • Ben Avison's avatar
      Support the Raspberry Pi model B+ · cce6a26f
      Ben Avison authored
        For removable slots without a card detect pin, disable the ticker routine
        to poll for the card-detect state, because the HAL is unable to report
        any meaningful result. Pass through the fact that it is one of these types
        of slots to SDFS, where card removal / change is detected by use of
        timeouts instead.
        Already in use in RC12a.
      Version 0.08. Tagged as 'SDIODriver-0_08'
  13. 01 Apr, 2013 1 commit
    • Jeffrey Lee's avatar
      Adjust startup logic to fix SDCMOS · c0c3104e
      Jeffrey Lee authored
        c/module, cmhg/SDIOHdr - Instead of initialising the device list inside a callback, we now initialise it when we receive our ModulePostInit service call.
        This fixes SDCMOS initialisation; both SDCMOS and SDIODriver were using callbacks to initialise themselves, but the recent fixes to callback triggering during ROM init meant that the SDIODriver callback was no longer guaranteed to occur before the SDCMOS callback. This was preventing SDCMOS from initialising properly as SDFS/SDIODriver wouldn't have been available yet.
        Tested on Raspberry Pi and Pandora with SDCMOS-friendly SD cards
      Version 0.07. Tagged as 'SDIODriver-0_07'
  14. 24 Jan, 2013 1 commit
  15. 06 Jul, 2012 1 commit
    • Ben Avison's avatar
      Change to order of SD controllers · 87356123
      Ben Avison authored
        Now uses OS_Hardware 5 if it is available, so that SD controllers are
        allocated in the order in which they were registered, irrespective of
        whether they were registered before or after SDIODriver initialised.
        Builds, but not tested
      Version 0.05. Tagged as 'SDIODriver-0_05'
  16. 03 Jul, 2012 1 commit
    • Ben Avison's avatar
      Added support for SD on OMAP4 · 0237f79b
      Ben Avison authored
        The OMAP4 SD controller is more fussy about how it is reset than the OMAP3
        and BCM2835 controllers - more details in inline comments. Issue identified
        by Willi Theiss, but I have implemented the fix differently. Also added
        Willi's support for DebugLib debugging.
        Tested on Beagleboard, Raspberry Pi and Pandaboard, and with the usual
        set of 30+ cards.
      Version 0.04. Tagged as 'SDIODriver-0_04'
  17. 01 Jul, 2012 1 commit
    • Ben Avison's avatar
      Changes to better support the Raspberry Pi · 918d3e25
      Ben Avison authored
        * On SD memory cards and SDIO cards, disengage the card's internal pull-up
          resistor on DAT3. This is designed to function as part of the card detect
          mechanism on some boards (not any of the ones we support) but this is
          probably desirable in order to ensure the impedance of all the DAT lines
        * Pace data buffer reads by polling the Present State register rather than
          using the Read Buffer Ready interrupt. This is because the controller on
          the BCM2835 occasionally fails to issue the interrupt (another clock
          domain crossing bug in the chip?) so we end up waiting for a timeout and
          then retrying, with the overall effect appearing as variable data transfer
          rates. When background transfers are implemented, we will need to rely on
          TickerV to do this polling. Fortunately, the OMAP3 controller seems to be
          unaffected by this change.
        * Don't use the High Speed Enable bit in the Host Control 1 register - it
          seems to cause more trouble than it's worth (more discussion in inline
        Tested on my full collection of test cards on both beagleboard and RPi.
      Version 0.03. Tagged as 'SDIODriver-0_03'
  18. 15 Jun, 2012 1 commit
    • Ben Avison's avatar
      Fixed bug shown up by Raspberry Pi running in high speed mode · 93e167ee
      Ben Avison authored
        The Arasan controller, unlike the OMAP3 one, pays attention to the HSE
        bit in the Control 1 register. This wasn't being reset before starting
        up the next card to be inserted, which caused some cards to fail to
        Tested on Raspberry Pi, should have no effect on OMAP3.
      Version 0.02. Tagged as 'SDIODriver-0_02'
  19. 07 Jun, 2012 1 commit