Commit c762d288 authored by John Ballance's avatar John Ballance
Browse files

Updated various comments. Cleared unneeded mods

Detail:
  Removed most of the mods inserted in last update.
  Improved the comments.
Admin:
  tested on iMx6


Version 0.20. Tagged as 'SDCMOS-0_20'
parent 21f0aff2
......@@ -11,13 +11,13 @@
GBLS Module_HelpVersion
GBLS Module_ComponentName
GBLS Module_ComponentPath
Module_MajorVersion SETS "0.19"
Module_Version SETA 19
Module_MajorVersion SETS "0.20"
Module_Version SETA 20
Module_MinorVersion SETS ""
Module_Date SETS "19 Jun 2018"
Module_ApplicationDate SETS "19-Jun-18"
Module_Date SETS "21 Jun 2018"
Module_ApplicationDate SETS "21-Jun-18"
Module_ComponentName SETS "SDCMOS"
Module_ComponentPath SETS "cddl/RiscOS/Sources/HWSupport/SD/SDCMOS"
Module_FullVersion SETS "0.19"
Module_HelpVersion SETS "0.19 (19 Jun 2018)"
Module_FullVersion SETS "0.20"
Module_HelpVersion SETS "0.20 (21 Jun 2018)"
END
/* (0.19)
/* (0.20)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.19
#define Module_MajorVersion_CMHG 0.20
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 19 Jun 2018
#define Module_Date_CMHG 21 Jun 2018
#define Module_MajorVersion "0.19"
#define Module_Version 19
#define Module_MajorVersion "0.20"
#define Module_Version 20
#define Module_MinorVersion ""
#define Module_Date "19 Jun 2018"
#define Module_Date "21 Jun 2018"
#define Module_ApplicationDate "19-Jun-18"
#define Module_ApplicationDate "21-Jun-18"
#define Module_ComponentName "SDCMOS"
#define Module_ComponentPath "cddl/RiscOS/Sources/HWSupport/SD/SDCMOS"
#define Module_FullVersion "0.19"
#define Module_HelpVersion "0.19 (19 Jun 2018)"
#define Module_LibraryVersionInfo "0:19"
#define Module_FullVersion "0.20"
#define Module_HelpVersion "0.20 (21 Jun 2018)"
#define Module_LibraryVersionInfo "0:20"
......@@ -23,6 +23,19 @@
; Use is subject to license terms.
;
; Note SDCMOS is responsible for keepin the copy of CMOS RAM stored on
; the SD card updated. It is NOT responsible for loading it - loading
; is done as part of the ROM image loading process.
;
; SDCMOS will only act if no other CMOS RAM is reported to be present.
;
; If StoreAtDiscAddress supplies a disc address the CMOS is stored at that
; hard coded disc address
; Otherwise it is stored in file on disc.
; Where UBoot loading is used this file is loaded before the ROM image is loaded
; Where StoreAtDiscAddress is used the disc address used is typically part of
; the rom image that gets loaded.
GET Hdr:ListOpts
GET Hdr:Macros
GET Hdr:System
......@@ -86,6 +99,7 @@ Len_SaveCMOS * .-SaveCMOS
]
ReqdAPIMajor * 0
Init ROUT
......@@ -145,28 +159,6 @@ CallBackFromInit ROUT
BLVS TryInit
BVS %FT90
]
[ :DEF: StoreAtDiscAddress
; See if a CMOS reset has occurred, if not our copy on the SD card
; is usable, so load cmos from it
; do this before we sit on ByteV and react to CMOS writes
MOV r0, #OsByte_ReadCMOS
MOV r1, #SystemSpeedCMOS
SWI XOS_Byte
MOVVS r2, #0
TST r2, #CMOSResetBit
BNE %ft10 ; CMOS reset
mov r6, #256
sub sp, sp, r6
MOV r1, #1 ; read
LDR r2, =StoreAtDiscAddress
MOV r3, sp
MOV r4, r6
SWI XSDFS_DiscOp
BLVC StackToCMOS
add sp, sp, r6
]
; All good - get on ByteV
10 MOV r0, #ByteV
......@@ -375,45 +367,30 @@ MyByteV
CMOSToStack ROUT
MOV r4, lr
; Copy the CMOS RAM into a block on the stack (should be small enough)
; in physical address order
; CMOS RAM image &00-&ef is stored in physical address order
; &40-&ff,&10-&3f
; R6 is byte count to use. Image is at sp to sp+r6-1
SUB sp, sp, r6
MOV r3, #0
MOV r1, #0 ; CMOS address
30 MOV r0, #OsByte_ReadCMOS
MOV r1, r3
CMP r3, #&10
ADDLO r1, r1, #&40
CMP r3, #&40
ADDLO r1, r1, #&F0
CMP r3, #&100
SUBLO r1, r1, #&40
CMP R1, #&F0
BGE %FT31
CMP R1, #&C0
ADDLT R3, R1, #&40
SUBGE R3, R1, #&B0
SWI XOS_Byte
MOVVS r2, #0
STRB r2, [sp, r3]
ADD r3, r3, #1
CMP r3, r6
31 ADD r1, r1, #1
CMP r1, r6
BLO %B30
MOV r2, #-1
STR r2, [sp, #&0] ; pseudo rtc space
STR r2, [sp, #&4]
STR r2, [sp, #&8]
STR r2, [sp, #&c]
MOV pc, r4
;
StackToCMOS ROUT
MOV r4, lr
; Copy a block on the stack into the CMOS RAM (should be small enough)
; from physical address order
; R6 is byte count to use. Image is at sp to sp+r6-1
MOV r3, #0
31 MOV r0, #OsByte_WriteCMOS
MOV r1, r3
CMP r3, #&10
ADDLO r1, r1, #&40
CMP r3, #&40
ADDLO r1, r1, #&F0
CMP r3, #&100
SUBLO r1, r1, #&40
LDRB r2, [sp, r3]
SWI XOS_Byte
ADD r3, r3, #1
CMP r3, r6
BLO %B31
MOV pc, r4
]
Final ROUT
......@@ -435,4 +412,6 @@ Final ROUT
CLRV
EXIT
END
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