Skip to content
GitLab
Projects
Groups
Snippets
Help
Loading...
Help
Help
Support
Community forum
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in
Toggle navigation
Open sidebar
RiscOS
S
Sources
HWSupport
IIC
Commits
2e3238d7
Commit
2e3238d7
authored
May 10, 2001
by
Kevin Bracey
Browse files
Changed to use ObjAsm and centralised Makefiles. Some 32-bit fixes.
Version 0.18, 4.5.2.2. Tagged as 'IIC-0_18-4_5_2_2'
parent
4c0cb9ad
Changes
4
Hide whitespace changes
Inline
Side-by-side
Showing
4 changed files
with
52 additions
and
93 deletions
+52
-93
Makefile
Makefile
+5
-54
VersionASM
VersionASM
+6
-6
VersionNum
VersionNum
+8
-8
s/IICMod
s/IICMod
+33
-25
No files found.
Makefile
View file @
2e3238d7
...
...
@@ -19,62 +19,13 @@
# ***********************************
# Date Name Description
# ---- ---- -----------
#
25
-May-
94 AMcC
Creat
ed
.
#
10
-May-
01 KJB
Nick
ed
#
#
# Paths
#
EXP_HDR
=
<
export
$dir
>
#
# Generic options:
#
MKDIR
=
cdir
AS
=
aasm
CP
=
copy
RM
=
remove
STRIP
=
stripdepnd
CCFLAGS
=
-c
-depend
!
Depend
-IC
:
ASFLAGS
=
-depend
!
Depend
-Stamp
-quit
-module
-To
$@
-From
CPFLAGS
=
~cfr~v
#
# Program specific options:
#
COMPONENT
=
IIC
SOURCE
=
s.IICMod
TARGET
=
rm.IIC
EXPORTS
=
${EXP_HDR}
.
${COMPONENT}
#
# Generic rules:
#
rom
:
${TARGET}
@
echo
${COMPONENT}
: rom module built
export
:
${EXPORTS}
@
echo
${COMPONENT}
:
export complete
install_rom
:
${TARGET}
${CP}
${TARGET}
${INSTDIR}
.
${COMPONENT}
${CPFLAGS}
@
echo
${COMPONENT}
: rom module installed
clean
:
${RM}
${TARGET}
${STRIP}
@
echo
${COMPONENT}
: cleaned
resources
:
${MKDIR}
${RESDIR}
.
${COMPONENT}
${CP}
LocalRes:Messages
${RESDIR}
.
${COMPONENT}
.Messages
${CPFLAGS}
@
echo
${COMPONENT}
: resource files copied
${TARGET}
:
${SOURCE}
${AS}
${ASFLAGS}
${SOURCE}
COMPONENT
=
IIC
ROM_SOURCE
=
s.IICMod
${EXP_HDR}.${COMPONENT}
:
hdr.${COMPONENT}
${CP}
hdr.
${COMPONENT}
$@
${CPFLAGS}
include
StdTools
include
AAsmModule
# Dynamic dependencies:
VersionASM
View file @
2e3238d7
...
...
@@ -13,12 +13,12 @@
GBLS Module_ComponentPath
Module_MajorVersion SETS "0.18"
Module_Version SETA 18
Module_MinorVersion SETS "4.5.2.
1
"
Module_Date SETS "0
7
Ma
r
2001"
Module_ApplicationDate2 SETS "0
7
-Ma
r
-01"
Module_ApplicationDate4 SETS "0
7
-Ma
r
-2001"
Module_MinorVersion SETS "4.5.2.
2
"
Module_Date SETS "
1
0 Ma
y
2001"
Module_ApplicationDate2 SETS "
1
0-Ma
y
-01"
Module_ApplicationDate4 SETS "
1
0-Ma
y
-2001"
Module_ComponentName SETS "IIC"
Module_ComponentPath SETS "RiscOS/Sources/HWSupport/IIC"
Module_FullVersion SETS "0.18 (4.5.2.
1
)"
Module_HelpVersion SETS "0.18 (0
7
Ma
r
2001) 4.5.2.
1
"
Module_FullVersion SETS "0.18 (4.5.2.
2
)"
Module_HelpVersion SETS "0.18 (
1
0 Ma
y
2001) 4.5.2.
2
"
END
VersionNum
View file @
2e3238d7
...
...
@@ -4,19 +4,19 @@
*
*/
#define Module_MajorVersion_CMHG 0.18
#define Module_MinorVersion_CMHG 4.5.2.
1
#define Module_Date_CMHG 0
7
Ma
r
2001
#define Module_MinorVersion_CMHG 4.5.2.
2
#define Module_Date_CMHG
1
0 Ma
y
2001
#define Module_MajorVersion "0.18"
#define Module_Version 18
#define Module_MinorVersion "4.5.2.
1
"
#define Module_Date "0
7
Ma
r
2001"
#define Module_MinorVersion "4.5.2.
2
"
#define Module_Date "
1
0 Ma
y
2001"
#define Module_ApplicationDate2 "0
7
-Ma
r
-01"
#define Module_ApplicationDate4 "0
7
-Ma
r
-2001"
#define Module_ApplicationDate2 "
1
0-Ma
y
-01"
#define Module_ApplicationDate4 "
1
0-Ma
y
-2001"
#define Module_ComponentName "IIC"
#define Module_ComponentPath "RiscOS/Sources/HWSupport/IIC"
#define Module_FullVersion "0.18 (4.5.2.
1
)"
#define Module_HelpVersion "0.18 (0
7
Ma
r
2001) (4.5.2.
1
)"
#define Module_FullVersion "0.18 (4.5.2.
2
)"
#define Module_HelpVersion "0.18 (
1
0 Ma
y
2001) (4.5.2.
2
)"
s/IICMod
View file @
2e3238d7
...
...
@@ -53,8 +53,6 @@ KernelDoesIIC SETL {TRUE} :LAND: ReentrancyCheck ; Until the kernel's IIC
#
1
; AddError2 IIC_NoAcknowledge, "No acknowledge from IIC device"
AddError2
IIC_InUse
,
"IIC operation in progress"
LEADR
Module_LoadAddr
TAB
*
9
LF
*
10
FF
*
12
...
...
@@ -88,6 +86,8 @@ IIC_WorkspaceSize * :INDEX: @
; **************** Module code starts here **********************
AREA
|IIC$Code|
,
CODE
,
READONLY
,
PIC
Module_BaseAddr
DCD
0
...
...
@@ -455,7 +455,7 @@ ReturnIICInUseError
SetC1C0
ROUT
[
No26bitCode
Push
"R0-R3,R14"
mrs
,
R3
,
CPSR
MRS
R3
,
CPSR
TEQ
PC
,
#
0
; set NE
|
Push
"R0-R2,R14"
...
...
@@ -464,7 +464,7 @@ SetC1C0 ROUT
SetOrCheck
[
No26bitCode
ORR
R14
,
R3
,
#
I32_bit
; disable interrupts round access to IOCControlSoftCopy
msr
,
CPSR_c
,
R14
; preserves Z flag
MSR
CPSR_c
,
R14
; preserves Z flag
|
ORR
R14
,
R14
,
#
I_bit
; disable interrupts round access to IOCControlSoftCopy
TEQP
R14
,
#
0
...
...
@@ -497,7 +497,7 @@ SetOrCheck
BL
DoMicroDelay
[
No26bitCode
msr
,
CPSR_cf
,
R3
MSR
CPSR_cf
,
R3
Pull
"R0-R3,PC"
|
Pull
"R0-R2,PC"
,,^
...
...
@@ -508,7 +508,7 @@ SetOrCheck
SetC1C0CheckClock
ROUT
[
No26bitCode
Push
"R0-R3,R14"
mrs
,
R3
,
CPSR
MRS
R3
,
CPSR
TEQ
R0
,
R0
; set EQ
|
Push
"R0-R2,R14"
...
...
@@ -553,7 +553,7 @@ DoMicroDelay ROUT
ClockData
ROUT
[
No26bitCode
Push
"R1,R2,R14"
mrs
,
R2
,
CPSR
MRS
R2
,
CPSR
|
Push
"R1, R14"
]
...
...
@@ -566,7 +566,7 @@ ClockData ROUT
[
No26bitCode
ORR
r1
,
r2
,
#
I32_bit
msr
,
CPSR_c
,
r1
MSR
CPSR_c
,
r1
|
ORR
r1
,
pc
,
#
I_bit
TEQP
r1
,
#
0
...
...
@@ -581,7 +581,7 @@ ClockData ROUT
BL
SetC1C0
[
No26bitCode
msr
,
CPSR_cf
,
R2
MSR
CPSR_cf
,
R2
Pull
"R1,R2,PC"
|
Pull
"R1, PC"
,,^
...
...
@@ -597,7 +597,7 @@ ClockData ROUT
Start
ROUT
[
No26bitCode
Push
"R0-R3,R14"
mrs
,
R3
,
CPSR
MRS
R3
,
CPSR
|
Push
"R0-R2,R14"
]
...
...
@@ -625,7 +625,7 @@ Start ROUT
BL
SetC1C0
[
No26bitCode
msr
,
CPSR_f
,
R3
MSR
CPSR_f
,
R3
Pull
"R0-R3,PC"
|
Pull
"R0-R2,PC"
,,^
...
...
@@ -651,10 +651,10 @@ Acknowledge ROUT
; This allows BMU to detect idle condition by polling
[
No26bitCode
mrs
,
R1
,
CPSR
MRS
R1
,
CPSR
Push
"R1"
ORR
r1
,
r1
,
#
I32_bit
msr
,
CPSR_c
,
r1
MSR
CPSR_c
,
r1
|
MOV
R1
,
PC
Push
"R1"
...
...
@@ -677,16 +677,24 @@ Acknowledge ROUT
Pull
"R1"
[
No26bitCode
msr
,
CPSR_c
,
R1
MSR
CPSR_c
,
R1
|
TEQP
PC
,
R1
]
TST
R2
,
#
1
; should be LO for correct acknowledge
[
No26bitCode
MRS
R2
,
CPSR
|
MOV
R2
,
PC
]
BICEQ
R2
,
R2
,
#
V_bit
; clear V if correct acknowledge
ORRNE
R2
,
R2
,
#
V_bit
; set V if no acknowledge
[
No26bitCode
MSR
CPSR_f
,
R2
|
TEQP
R2
,
#
0
]
Pull
"R0-R2,PC"
...
...
@@ -700,7 +708,7 @@ Acknowledge ROUT
Stop
ROUT
[
No26bitCode
Push
"R0-R2,R14"
mrs
,
R2
,
CPSR
MRS
R2
,
CPSR
|
Push
"R0,R1,R14"
]
...
...
@@ -716,7 +724,7 @@ Stop ROUT
BL
SetC1C0
[
No26bitCode
msr
,
CPSR_f
,
R2
MSR
CPSR_f
,
R2
Pull
"R0-R2,PC"
|
Pull
"R0,R1,PC"
,,^
...
...
@@ -734,7 +742,7 @@ Stop ROUT
TXByte
ROUT
[
No26bitCode
Push
"R0-R3,R14"
mrs
,
R3
,
CPSR
MRS
R3
,
CPSR
|
Push
"R0-R2,R14"
]
...
...
@@ -747,7 +755,7 @@ TXByte ROUT
MOVS
R1
,
R1
,
LSR
#
1
BNE
%BT10
[
No26bitCode
msr
,
CPSR_f
,
R3
MSR
CPSR_f
,
R3
Pull
"R0-R3,PC"
|
Pull
"R0-R2,PC"
,,^
...
...
@@ -764,7 +772,7 @@ TXByte ROUT
RXByte
ROUT
[
No26bitCode
Push
"R1-R5, R14"
mrs
,
R5
,
CPSR
MRS
R5
,
CPSR
|
Push
"R1-R4, R14"
]
...
...
@@ -777,10 +785,10 @@ RXByte ROUT
BL
SetC1C0
10
[
No26bitCode
mrs
,
R1
,
CPSR
MRS
R1
,
CPSR
Push
"R1"
ORR
R1
,
R1
,#
I32_bit
msr
,
CPSR_c
,
R1
; Disable ints if not talking to BMU
MSR
CPSR_c
,
R1
; Disable ints if not talking to BMU
|
MOV
LR
,
PC
Push
"LR"
...
...
@@ -802,7 +810,7 @@ RXByte ROUT
[
No26bitCode
Pull
"R1"
msr
,
CPSR_c
,
R1
; restore interrupt state
MSR
CPSR_c
,
R1
; restore interrupt state
|
Pull
"LR"
TEQP
PC
,
LR
; restore interrupt state
...
...
@@ -813,13 +821,13 @@ RXByte ROUT
MOV
R0
,
R3
; return the result in R0
[
No26bitCode
msr
,
CPSR_f
,
R5
MSR
CPSR_f
,
R5
Pull
"R1-R5, PC"
|
Pull
"R1-R4, PC"
,,^
]
CopyError
E
NTRY
r1
-
r7
CopyError
E
ntry
r1
-
r7
BL
open_messagefile
EXIT
VS
MOV
R4
,
R11
; (parameter) -> R4
...
...
@@ -837,7 +845,7 @@ message_filename
ALIGN
open_messagefile
E
NTRY
r0
-
r2
open_messagefile
E
ntry
r0
-
r2
LDR
r0
,
MessageFile_Open
CMP
r0
,
#
0
EXIT
NE
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
.
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment