Commits (8)
  • John Ballance's avatar
    Added conditional include of HALDevice to enable standalone build · 3373bb08
    John Ballance authored
    Detail:
      Hdr.GPIODevice
    Admin:
    
    
    Version 0.62. Tagged as 'GPIO-0_62'
    3373bb08
  • John Ballance's avatar
    Update GPIODevice to contain entry points for iMx6 with API 0.1 with single... · e8147082
    John Ballance authored
    Update GPIODevice to contain entry points for iMx6 with API 0.1 with single pin based calls, and initial entry points for API 0.2 with register wide calls.
    
     Detail:
      iMx6 has GPIO calls in the HAL that are based on single pin calls, cf those in OMAP3/4
      which (in iMx6 case) are exposed via the GPIO HAPDevice. These are modelled on calls
      in the OMAP series HALs, though these latter are not yet exposed.
      Ongoing work in other HALs provides an extended series of register wide calls. Initial
      entry points for these are also provided.
    
    Admin:
     tested on iMx6
    
    
    Version 0.63. Tagged as 'GPIO-0_63'
    e8147082
  • ROOL's avatar
    Transition Pi HAL to API 1.00 · 2a65474e
    ROOL authored
    Detail:
      Add extra definitions and structure layouts to GPIODevice header. Remove local inclusion of Hdr:HALDevice, in line with the other HAL device headers (BMU, Mixer, RTC, et al).
      Remove GPIOType/Revision definitions for Pi.
      Switch out the Pi machine checks in the module so it still builds.
    Admin:
      GPIO module built, but not tested.
    
    Version 0.64. Tagged as 'GPIO-0_64'
    2a65474e
  • ROOL's avatar
    Implementation of API 1.00 · a9f5f619
    ROOL authored
    Detail:
      By delagating the hardware access element to the underlying HAL, the GPIO module becomes much simpler.
      None of the platform specific SWIs (eg. GPIO_AuxAsUSB) are required, or implemented. This information can be obtained by enumerating the pins and switching members of the same group by setting their mode for example.
      A new SWI, GPIO_Features is added, though the returned flags are currently 0 the presence of the SWI demarks the HAL variant.
      A new command, *GPIODevices lists the GPIO controller(s) known and their basic input/output state at a glance.
      See the StrongHelp manual for full details.
    Admin:
      Tested on not-a-Pi too, to ensure it doesn't attach to pre API 1.00.
    
    Version 1.00, 1.11.2.1. Tagged as 'GPIO-1_00-1_11_2_1'
    a9f5f619
  • Robert Sprowson's avatar
    Export C version of the device header · 659df1b2
    Robert Sprowson authored
    Move some of the struct definitions out into a new header file, which is appended at build time to the GPIODevice. Some minor renaming to follow the conventions from other devices (eg. whether to split with underscores or not).
    Sync GPIO types in the docs.
    
    Version 1.00, 1.11.2.2. Tagged as 'GPIO-1_00-1_11_2_2'
    659df1b2
  • Robert Sprowson's avatar
    Fix for abort using GPIO_ReadEvent · f8a60f83
    Robert Sprowson authored
    Missing '&' meant an attempt to put the result to the wrong address.
    Ref https://www.riscosopen.org/forum/forums/11/topics/9414
    
    Version 1.00, 1.11.2.3. Tagged as 'GPIO-1_00-1_11_2_3'
    f8a60f83
  • Robert Sprowson's avatar
    Remove OMAP3/OMAP4 declarations · 703517b2
    Robert Sprowson authored
    Now held privately within the respective HAL.
    Added rev D revision for WandBoard Quad.
    
    Version 1.00, 1.11.2.4. Tagged as 'GPIO-1_00-1_11_2_4'
    703517b2
  • Robert Sprowson's avatar
    Remove OMAP3/OMAP4 declarations · 96ae0806
    Robert Sprowson authored
    Now held privately within the respective HAL.
    Added rev D revision for WandBoard Quad.
    
    Version 1.00, 1.11.2.4. Tagged as 'GPIO-1_00-1_11_2_4'
    96ae0806
hdr/** gitlab-language=armasm linguist-language=armasm linguist-detectable=true
**/hdr/** gitlab-language=armasm linguist-language=armasm linguist-detectable=true
s/** gitlab-language=armasm linguist-language=armasm linguist-detectable=true
*,ffb gitlab-language=bbcbasic linguist-language=bbcbasic linguist-detectable=true
c/** gitlab-language=c linguist-language=c linguist-detectable=true
h/** gitlab-language=c linguist-language=c linguist-detectable=true
cmhg/** gitlab-language=cmhg linguist-language=cmhg linguist-detectable=true
No preview for this file type
......@@ -32,11 +32,14 @@ COMPONENT = GPIO
ASMHDRS = GPIODevice
ASMCHDRS = GPIODevice
HDRS =
OBJS = GetAll
CMHGFILE =
CUSTOMRES = no
ROMASMDEFINES = -pd "ROM SETL {TRUE}"
OBJS = gpio
CMHGDEPENDS = gpio
ROMCDEFINES = -DROM
include CModule
expasmc.GPIODevice: hdr.GPIODevice h.GPIODevice
${HDR2H} hdr.GPIODevice ${C_EXP_HDR}.GPIODevice
${FAPPEND} ${C_EXP_HDR}.GPIODevice h.GPIODevice ${C_EXP_HDR}.GPIODevice
# Dynamic dependencies:
#{DictTokens}
E02:The GPIO module had a problem with the hardware
E09:Operation not valid for this pin
E0a:Pin not found
Range:MSB %s LSB
In:i
Out:o
......@@ -11,13 +11,13 @@
GBLS Module_HelpVersion
GBLS Module_ComponentName
GBLS Module_ComponentPath
Module_MajorVersion SETS "0.61"
Module_Version SETA 61
Module_MinorVersion SETS ""
Module_Date SETS "28 Oct 2015"
Module_ApplicationDate SETS "28-Oct-15"
Module_MajorVersion SETS "1.00"
Module_Version SETA 100
Module_MinorVersion SETS "1.11.2.4"
Module_Date SETS "30 Mar 2018"
Module_ApplicationDate SETS "30-Mar-18"
Module_ComponentName SETS "GPIO"
Module_ComponentPath SETS "bsd/RiscOS/Sources/ThirdParty/TankStage/HWSupport/GPIO"
Module_FullVersion SETS "0.61"
Module_HelpVersion SETS "0.61 (28 Oct 2015)"
Module_FullVersion SETS "1.00 (1.11.2.4)"
Module_HelpVersion SETS "1.00 (30 Mar 2018) 1.11.2.4"
END
/* (0.61)
/* (1.00)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.61
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 28 Oct 2015
#define Module_MajorVersion_CMHG 1.00
#define Module_MinorVersion_CMHG 1.11.2.4
#define Module_Date_CMHG 30 Mar 2018
#define Module_MajorVersion "0.61"
#define Module_Version 61
#define Module_MinorVersion ""
#define Module_Date "28 Oct 2015"
#define Module_MajorVersion "1.00"
#define Module_Version 100
#define Module_MinorVersion "1.11.2.4"
#define Module_Date "30 Mar 2018"
#define Module_ApplicationDate "28-Oct-15"
#define Module_ApplicationDate "30-Mar-18"
#define Module_ComponentName "GPIO"
#define Module_ComponentPath "bsd/RiscOS/Sources/ThirdParty/TankStage/HWSupport/GPIO"
#define Module_FullVersion "0.61"
#define Module_HelpVersion "0.61 (28 Oct 2015)"
#define Module_LibraryVersionInfo "0:61"
#define Module_FullVersion "1.00 (1.11.2.4)"
#define Module_HelpVersion "1.00 (30 Mar 2018) 1.11.2.4"
#define Module_LibraryVersionInfo "1:0"
/*
* Copyright (c) 2016, RISC OS Open Ltd
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of RISC OS Open Ltd nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include "swis.h"
#include "Global/NewErrors.h"
#include "Global/Services.h"
#include "Global/HALDevice.h"
#include "Global/HALEntries.h"
#include "Global/OSEntries.h"
#include "Interface/GPIODevice.h"
#include "GPIOHdr.h"
#define GPIO_MAX_DEVICES 8 /* Arbitrary */
#define GPIO_MAJOR_VSN 1
#define ErrorBase_GPIO 0x81DD20
#define UNUSED(k) (k)=(k) /* Fewer warnings */
#define CHECK_PIN_RANGE(p,d) { uint32_t r = (p) >> 5; \
(d) = gpio_device[r]; \
if ((r >= GPIO_MAX_DEVICES) || ((d) == NULL)) \
return lookup_error(ERR0A_NOT_FOUND); \
}
#define GPIO_MODE_PULL_EN (1<<5) /* Enable, else disable */
#define GPIO_MODE_PULL_UP (1<<6) /* Pull up, else down */
#define GPIO_MODE_EVENT_EN (1<<7) /* Enable, else disable */
#define GPIO_MODE_EVENT_RISING (1<<8) /* Rising/high edge trigger, else falling/lo */
#define GPIO_MODE_EVENT_EDGE (1<<9) /* Edge sensitive, else level */
#define GPIO_MODE_VALID_MASK (0x1F<<5)
#define GPIO_MODE_BITS (0x1F)
#define GPIO_INFO_FULL 0x4C4C5546
typedef struct
{
uint32_t errnum;
char token[8];
} internaterr_t;
enum
{
ERR00_UK_OPERATION = 0, /* Unused */
ERR01_MALLOC_FAIL, /* Unused */
ERR02_HW_PROBLEM,
ERR03_FAIL_MAP_LOGICAL_GPIO, /* Unused */
ERR04_FAIL_MAP_LOGICAL_CONTROL, /* Unused */
ERR05_FAIL_MAP_LOGICAL_SRAM, /* Unused */
ERR06_RMA_CLEAR, /* Unused */
ERR07_NO_SOC_SUPPORT, /* Unused */
ERR08_TICKERV_CLAIM, /* Unused */
ERR09_NOT_PERMITTED,
ERR0A_NOT_FOUND
};
extern void *Resources(void); /* Generated by 'resgen' */
static uint32_t message_block[4];
static gpiodevice_t *gpio_device[GPIO_MAX_DEVICES];
/*
* Internationalisation
*/
static _kernel_oserror *lookup_error(uint32_t which)
{
_kernel_oserror *error;
internaterr_t msg_errblk;
/* Translate via MessageTrans' internal buffer */
sprintf(msg_errblk.token, "E%02x", which);
msg_errblk.errnum = which + ErrorBase_GPIO;
error = _swix(MessageTrans_ErrorLookup, _INR(0,7),
&msg_errblk, message_block, 0, 0, 0, 0, 0, 0);
return error;
}
static const char *lookup_msg(const char *token, char *buffer, size_t buffersize)
{
_kernel_oserror *error;
/* Translate via MessageTrans' internal buffer */
error = _swix(MessageTrans_Lookup, _INR(0,3),
message_block, token, buffer, buffersize);
if (error != NULL) strcpy(buffer, "?");
return buffer;
}
/*
* Implementations
*/
static _kernel_oserror *do_swi_readoe(uint32_t pin, uint32_t *state)
{
gpiodevice_t *device;
uint32_t mask;
CHECK_PIN_RANGE(pin, device);
mask = 1 << (pin & 0x1F);
*state = (device->DataDirection(&device->dev, 0, 0) & mask) ? 1 : 0;
return NULL;
}
static _kernel_oserror *do_swi_writeoe(uint32_t pin, uint32_t state)
{
gpiodevice_t *device;
uint32_t mask;
CHECK_PIN_RANGE(pin, device);
mask = 1 << (pin & 0x1F);
device->DataDirection(&device->dev, mask, state ? mask : 0);
return NULL;
}
static _kernel_oserror *do_swi_readmode(uint32_t pin, uint32_t *state)
{
gpiodevice_t *device;
uint32_t mask;
uint32_t mode, pullen, pulldir;
int even, evrisehigh, evedge;
CHECK_PIN_RANGE(pin, device);
mask = 1 << (pin & 0x1F);
/* Gather the info */
mode = device->ReadMode(&device->dev, pin & 0x1F);
pullen = device->PullControl(&device->dev, 0, 0);
pulldir = device->PullDirection(&device->dev, 0, 0);
device->EdgeControl(&device->dev, 0, &even, &evedge, &evrisehigh);
/* Pick out the bit requested */
if (pullen & mask) mode = mode |
GPIO_MODE_PULL_EN |
((pulldir & mask) ? GPIO_MODE_PULL_UP : 0);
if (even & mask) mode = mode |
GPIO_MODE_EVENT_EN |
((evrisehigh & mask) ? GPIO_MODE_EVENT_RISING : 0) |
((evedge & mask) ? GPIO_MODE_EVENT_EDGE : 0);
*state = mode;
return NULL;
}
static _kernel_oserror *do_swi_writemode(uint32_t pin, uint32_t state)
{
gpiodevice_t *device;
uint32_t mask;
int even, evrisehigh, evedge;
CHECK_PIN_RANGE(pin, device);
mask = 1 << (pin & 0x1F);
if (state & ~(GPIO_MODE_BITS | GPIO_MODE_VALID_MASK))
{
/* Unknown flags passed */
return lookup_error(ERR09_NOT_PERMITTED);
}
/* Set the mode first in case the option bits only stick in that mode */
device->WriteMode(&device->dev, pin & 0x1F, state & GPIO_MODE_BITS);
if (state & GPIO_MODE_PULL_EN)
{
device->PullDirection(&device->dev, mask, (state & GPIO_MODE_PULL_UP) ? mask : 0);
}
device->PullControl(&device->dev, mask, (state & GPIO_MODE_PULL_EN) ? mask : 0);
if (state & GPIO_MODE_EVENT_EN)
{
even = mask;
evrisehigh = (state & GPIO_MODE_EVENT_RISING) ? mask : 0;
evedge = (state & GPIO_MODE_EVENT_EDGE) ? mask : 0;
}
else
{
even = evrisehigh = evedge = 0;
}
device->EdgeControl(&device->dev, mask, &even, &evedge, &evrisehigh);
return NULL;
}
static _kernel_oserror *do_swi_readdata(uint32_t pin, uint32_t *state)
{
gpiodevice_t *device;
uint32_t mask;
CHECK_PIN_RANGE(pin, device);
mask = 1 << (pin & 0x1F);
*state = (device->ReadDataBits(&device->dev) & mask) ? 1 : 0;
return NULL;
}
static _kernel_oserror *do_swi_writedata(uint32_t pin, uint32_t state)
{
gpiodevice_t *device;
uint32_t mask;
CHECK_PIN_RANGE(pin, device);
mask = 1 << (pin & 0x1F);
if (state)
{
device->SetDataBits(&device->dev, mask);
}
else
{
device->ClearDataBits(&device->dev, mask);
}
return NULL;
}
static _kernel_oserror *do_swi_readevent(uint32_t pin, uint32_t *state)
{
gpiodevice_t *device;
uint32_t mask;
CHECK_PIN_RANGE(pin, device);
mask = 1 << (pin & 0x1F);
*state = (device->EdgePollStatus(&device->dev, 0) & mask) ? 1 : 0;
return NULL;
}
static _kernel_oserror *do_swi_writeevent(uint32_t pin, uint32_t state)
{
gpiodevice_t *device;
uint32_t mask;
CHECK_PIN_RANGE(pin, device);
mask = 1 << (pin & 0x1F);
device->EdgePollStatus(&device->dev, state ? 0 : mask);
return NULL;
}
static _kernel_oserror *do_swi_info(_kernel_swi_regs *r)
{
static const uint8_t dummylist[] = { 0xFF, 0xFF, 0xFF, 0xFF };
gpiodevice_t *device;
const gpio_enumerate_t *info;
int32_t low, high, pin, next;
size_t i;
if (r->r[0] == GPIO_INFO_FULL)
{
/* Full info
* => R0 = "FULL"
* R1 = opaque enumeration point (0 to start)
* R2 = HAL descriptor (0 to start)
* <= R0 = pointer to full pin info
* R1 = next enumeration point (or -1 if no more)
* R2 = HAL descriptor
* R3 = logical pin
*/
if (r->r[2] == 0)
{
device = gpio_device[0];
}
else
{
device = (gpiodevice_t *)r->r[2];
}
next = r->r[1];
info = device->Enumerate(&device->dev, &next);
if (info == NULL) return lookup_error(ERR0A_NOT_FOUND);
pin = (device->number << 5) + info->pin;
if (next == -1)
{
/* No more on that device, prepare to carry on on the next device.
* This ensures that callers of the SWI see pins in one long
* enumeration, but the HAL devices see the enumeration per
* each device.
*/
for (i = 0; i < (GPIO_MAX_DEVICES - 1); i++)
{
if (gpio_device[i] == device)
{
for (; i < GPIO_MAX_DEVICES; i++)
{
gpiodevice_t *tmpdevice = gpio_device[i + 1];
int32_t tmpnext = 0;
if (tmpdevice == NULL) break;
if (tmpdevice->Enumerate(&tmpdevice->dev, &tmpnext) != NULL)
{
/* Exists and has pins */
device = tmpdevice;
next = 0;
}
}
break;
}
}
}
r->r[0] = (int)info;
r->r[1] = next;
r->r[2] = (int)device;
r->r[3] = pin;
return NULL;
}
/* Not full info
* <= R0 = lowest pin (what if there are gaps?)
* R1 = highest pin (what if there are gaps?)
* R2 = pointer to alternate lists
*/
low = INT32_MAX;
high = 0;
for (i = 0; i < GPIO_MAX_DEVICES; i++)
{
device = gpio_device[i];
next = 0;
while ((device != NULL) && (next != -1))
{
info = device->Enumerate(&device->dev, &next);
if (info != NULL)
{
pin = (device->number << 5) + info->pin; /* Make contiguous */
if (pin < low) low = pin; /* Min */
if (pin > high) high = pin; /* Max */
}
}
}
r->r[0] = low;
r->r[1] = high;
r->r[2] = (int)dummylist;
return NULL;
}
static const char *do_formatted_bits(uint32_t value, char hi, char lo, char *buffer)
{
int32_t i;
char *b = buffer;
for (i = 31; i >= 0; i--)
{
*b = (value & (1 << i)) ? hi : lo;
b++;
if ((i % 8) == 0)
{
*b = ' ';
b++;
}
}
/* Write over the last separator */
b--;
*b = '\0';
return (const char *)buffer;
}
static _kernel_oserror *do_cmd_gpiodevices(void)
{
size_t i;
char input[2], output[2], range[64], bits[32 + 8];
uint32_t value;
gpiodevice_t *device;
lookup_msg("In", input, sizeof(input));
lookup_msg("Out", output, sizeof(output));
lookup_msg("Range", range, sizeof(range));
for (i = 0; i < GPIO_MAX_DEVICES; i++)
{
device = gpio_device[i];
if (device != NULL)
{
printf("%u: %s\n", i, device->dev.description);
putchar(' '); putchar(' '); putchar(' ');
value = device->DataDirection(&device->dev, 0, 0);
printf(range, do_formatted_bits(value, input[0], output[0], bits));
putchar('\n');
putchar(' '); putchar(' '); putchar(' ');
value = device->ReadDataBits(&device->dev);
printf(range, do_formatted_bits(value, '1', '0', bits));
putchar('\n');
}
}
return NULL;
}
/*
* Module initialise
*/
_kernel_oserror *gpio_init(const char *cmd_tail, int podule_base, void *pw)
{
gpiodevice_t *device;
_kernel_oserror *error;
int32_t pos = 0, count = 0;
/* Go looking for suitable GPIO devices */
while (1)
{
error = _swix(OS_Hardware, _INR(0,1) | _IN(8) | _OUTR(1,2),
HALDeviceType_Comms + HALDeviceComms_GPIO + (GPIO_MAJOR_VSN << 16), pos,
OSHW_DeviceEnumerate,
&pos, &device);
if (error != NULL) return error;
if ((pos == -1) && (count > 0))
{
/* Found something while looking */
break;
}
if (pos == -1)
{
static const internaterr_t badhard = { ErrorNumber_BadHard, "BadHard" };
/* No matches, quit */
return _swix(MessageTrans_ErrorLookup, _INR(0,2), &badhard, 0, 0);
}
if (((device->dev.version >> 16) == GPIO_MAJOR_VSN /* Major version match */) &&
(device->number < GPIO_MAX_DEVICES) &&
device->dev.Activate(&device->dev))
{
/* Note it */
gpio_device[device->number] = device;
count++;
}
}
#ifndef ROM
/* Register the messages for RAM based modules */
error = _swix(ResourceFS_RegisterFiles, _IN(0), Resources());
if (error != NULL) return error;
#endif
error = _swix(MessageTrans_OpenFile, _INR(0,2), message_block, Module_MessagesFile, 0);
if (error != NULL)
{
#ifndef ROM
_swix(ResourceFS_DeregisterFiles, _IN(0), Resources());
#endif
return error;
}
UNUSED(cmd_tail);
UNUSED(podule_base);
UNUSED(pw);
return NULL;
}
/*
* Module finalise
*/
_kernel_oserror *gpio_final(int fatal, int podule, void *pw)
{
size_t i;
/* Tidy up and deregister */
for (i = 0; i < GPIO_MAX_DEVICES; i++)
{
if (gpio_device[i] != NULL) gpio_device[i]->dev.Deactivate(&gpio_device[i]->dev);
}
_swix(MessageTrans_CloseFile, _IN(0), message_block);
#ifndef ROM
_swix(ResourceFS_DeregisterFiles, _IN(0), Resources());
#endif
UNUSED(fatal);
UNUSED(podule);
UNUSED(pw);
return NULL;
}
/*
* Module services
*/
void gpio_services(int service_number, _kernel_swi_regs *r, void *pw)
{
switch (service_number)
{
#ifndef ROM
case Service_ResourceFSStarting:
(*(void (*)(void *, void *, void *, void *))r->r[2])(Resources(), 0, 0, (void *)r->r[3]);
break;
#endif
}
UNUSED(pw);
}
/*
* Module commands
*/
_kernel_oserror *gpio_commands(const char *arg_string, int argc, int cmd_no, void *pw)
{
switch (cmd_no)
{
case CMD_GPIODevices:
return do_cmd_gpiodevices();
}
UNUSED(arg_string);
UNUSED(argc);
UNUSED(pw);
return NULL;
}
/*
* Module SWIs
*/
_kernel_oserror *gpio_swis(int swi_offset, _kernel_swi_regs *r, void *pw)
{
switch (swi_offset)
{
case GPIO_ReadData - GPIO_00:
return do_swi_readdata(r->r[0], (uint32_t *)&r->r[0]);
case GPIO_WriteData - GPIO_00:
return do_swi_writedata(r->r[0], r->r[1]);
case GPIO_ReadOE - GPIO_00:
return do_swi_readoe(r->r[0], (uint32_t *)&r->r[0]);
case GPIO_WriteOE - GPIO_00:
return do_swi_writeoe(r->r[0], r->r[1]);
case GPIO_ReadEvent - GPIO_00:
return do_swi_readevent(r->r[0], (uint32_t *)&r->r[0]);
case GPIO_WriteEvent - GPIO_00:
return do_swi_writeevent(r->r[0], r->r[1]);
case GPIO_Info - GPIO_00:
return do_swi_info(r);
case GPIO_ReadMode - GPIO_00:
return do_swi_readmode(r->r[0], (uint32_t *)&r->r[0]);
case GPIO_WriteMode - GPIO_00:
return do_swi_writemode(r->r[0], r->r[1]);
case GPIO_Features - GPIO_00:
r->r[0] = 0; /* No newly introduced feature flags yet */
return NULL;
}
UNUSED(pw);
return error_BAD_SWI;
}
;
; Copyright (c) 2016, RISC OS Open Ltd
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of RISC OS Open Ltd nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
#include "Global/Services.h"
#include "VersionNum"
initialisation-code: gpio_init
finalisation-code: gpio_final
title-string: Module_ComponentName
help-string: Module_ComponentName Module_MajorVersion_CMHG Module_MinorVersion_CMHG
date-string: Module_Date_CMHG
international-help-file:"Resources:$.Resources."Module_ComponentName".Messages"
service-call-handler: gpio_services Service_ResourceFSStarting
swi-chunk-base-number: 0x58F80
swi-handler-code: gpio_swis
swi-decoding-table: GPIO,
ReadData, WriteData, ReadOE, WriteOE,
4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
ReadMode, WriteMode,
17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42,
ReadEvent, WriteEvent,
45, 46, Features, 48, 49, 50, 51, 52, 53,
Info
command-keyword-table: gpio_commands
GPIODevices(min-args:0, max-args:8,
international:,
help-text: "HDEV",
invalid-syntax: "SDEV")
/*
* Copyright (c) 2017, RISC OS Open Ltd
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of RISC OS Open Ltd nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef INTERFACE_GPIODEVICE_H
#define INTERFACE_GPIODEVICE_H
#pragma force_top_level
#pragma include_only_once
#include <stdint.h>
#include "Global/HALDevice.h"
typedef struct
{
uint32_t number : 8; /* The Nth of this type */
uint32_t mode : 5; /* Opaque alternate mode */
uint32_t unused : 3;
uint32_t type : 16; /* See GPIOType */
} gpio_grouplist_t;
typedef struct
{
uint32_t pin:5;
uint32_t can_output:1;
uint32_t can_input:1;
uint32_t unused:25;
uint32_t modes_allowed; /* Bit field */
gpio_grouplist_t modes[1];
} gpio_enumerate_t;
typedef struct gpiodevice
{
struct device dev;
uint32_t ports;
uint32_t number;
const gpio_enumerate_t *(*Enumerate)(struct device *, int *);
int (*SetDataBits)(struct device *, int);
int (*ClearDataBits)(struct device *, int);
void (*ToggleDataBits)(struct device *, int);
int (*ReadDataBits)(struct device *);
int (*DataDirection)(struct device *, int, int);
int /* 5 bit mode */ (*ReadMode)(struct device *, int);
int /* 5 bit mode */ (*WriteMode)(struct device *, int, int /* 5 bit mode */);
int (*PullControl)(struct device *, int, int);
int (*PullDirection)(struct device *, int, int);
int (*EdgeControl)(struct device *, int, int *, int *, int *);
int (*EdgePollStatus)(struct device *, int);
} gpiodevice_t;
#endif
/* In the exported copy of this file, the Hdr2H translation of hdr.GPIODevice will follow. */
......@@ -34,83 +34,82 @@ OldOpt SETA {OPT}
GBLL Included_Hdr_GPIODevice
Included_Hdr_GPIODevice SETL {TRUE}
; Device for GPIO devices
; This device just reports the board type and revision, so that the GPIO manager
; knows how everything is set up and which bits should be off-limits.
;
; Extra entries for basic GPIO device with all driver code in the GPIO module
; HALDevice_Version = 0
^ HALDeviceSize
HALDevice_GPIOType # 4
HALDevice_GPIORevision # 4
HALDevice_GPIO_Size * :INDEX: @
; Type & revision values specific to HALDeviceID_GPIO_OMAP3:
^ 0
GPIOType_OMAP3_BeagleBoard # 1 ; It's a BeagleBoard or BB-xM
GPIOType_OMAP3_DevKit8000 # 1 ; It's a DevKit 8000
GPIOType_OMAP3_IGEPv2 # 1 ; It's an IGEP v2
GPIOType_OMAP3_Pandora # 1 ; It's a Pandora
GPIOType_OMAP3_TouchBook # 1 ; It's a TouchBook
; BeagleBoard revision values:
^ 0
; BeagleBoard:
GPIORevision_BeagleBoard_AB # 1 ; Rev A or B
GPIORevision_BeagleBoard_C123 # 1 ; Rev C1, C2 or C3
GPIORevision_BeagleBoard_C4 # 1 ; Rev C4
; BeagleBoard-xM:
GPIORevision_BeagleBoard_xMA # 1 ; Rev A
GPIORevision_BeagleBoard_xMB # 1 ; Rev B
GPIORevision_BeagleBoard_xMC # 1 ; Rev C
; DevKit revision values:
^ 0
GPIORevision_DevKit8000_Unknown # 1
; IGEP revision values:
^ 0
GPIORevision_IGEPv2_BC # 1 ; Rev B or C (B-compatible)
GPIORevision_IGEPv2_C # 1 ; Rev C (not a B-compatible one)
; Pandora revision values:
^ 0
GPIORevision_Pandora_Unknown # 1
; TouchBook revision values:
^ 0
GPIORevision_TouchBook_Unknown # 1
; Type & revision values specific to HALDeviceID_GPIO_BCM2835:
^ 0
GPIOType_BCM2835_RaspberryPi # 1 ; It's a Raspberry Pi
; Raspberry Pi revision values:
;
; Extra entries for API 0.1 with basic pin based GPIO control in the HAL
; HALDevice_Version = 1
^ HALDevice_GPIO_Size
HALDevice_GPIOReadBit # 4
HALDevice_GPIOWriteBit # 4
HALDevice_GPIOSetAsInput # 4
HALDevice_GPIOSetAsOutput # 4
HALDevice_GPIOSetAndEnableIRQ # 4
HALDevice_GPIOIRQClear # 4
HALDevice_GPIODisableIRQ # 4
HALDevice_GPIOReadBitAddr # 4
HALDevice_GPIODeviceNumber # 4
HALDevice_GPIOReservedAPI1 # 4
HALDevice_GPIO_Size_0_1 * :INDEX: @
;
; Extra entries for API 1.0 with register wide GPIO control in the HAL
; HALDevice_Version = &10000
^ HALDeviceSize
HALDevice_GPIOPorts # 4
HALDevice_GPIONumber # 4
HALDevice_GPIOEnumerate # 4
HALDevice_GPIOSetDataBits # 4
HALDevice_GPIOClearDataBits # 4
HALDevice_GPIOToggleDataBits # 4
HALDevice_GPIOReadDataBits # 4
HALDevice_GPIODataDirection # 4
HALDevice_GPIOReadMode # 4
HALDevice_GPIOWriteMode # 4
HALDevice_GPIOPullControl # 4
HALDevice_GPIOPullDirection # 4
HALDevice_GPIOEdgeControl # 4
HALDevice_GPIOEdgePollStatus # 4
HALDevice_GPIO_Size_1_0 * :INDEX: @
; HALDevice_GPIOEnumerate structure
^ 0
GPIORevision_RaspberryPi_B_1 # 1 ; Model B Rev 1.0
GPIORevision_RaspberryPi_B_2 # 1 ; Model B Rev 2.0
GPIORevision_RaspberryPi_A_2 # 1 ; Model A Rev 2.0
GPIORevision_RaspberryPi_BPlus # 1 ; Model B+
GPIORevision_RaspberryPi_C_1 # 1 ; Model Compute Rev 1.0
GPIORevision_RaspberryPi_APlus # 1 ; Model A+
GPIORevision_RaspberryPi_Mk2_B_1 # 1 ; Model Pi 2
; Type & revision values specific to HALDeviceID_GPIO_OMAP4:
GPIOEnumerate_Pin # 1 ; 5 bit value
GPIOEnumerate_PinFlags_Output * 1:SHL:5 ; Capabilities of the pin when used as GPIO
GPIOEnumerate_PinFlags_Input * 1:SHL:6
# 3 ; Spare flags
GPIOEnumerate_ModesAllowed # 4 ; Bit field
GPIOEnumerate_GroupList # 0 ; Repeats of...
GPIOEnumerate_GroupListEnd * -1
^ 0
GPIOType_OMAP4_Panda # 1 ; It's a PandaBoard or PandaBoard-ES
; Panda revision values:
GPIOGroupList_Number # 1
GPIOGroupList_Mode # 1 ; Opaque 5 bit value
GPIOGroupList_Type # 2
GPIOGroupList_Size * :INDEX: @
; Group list types
^ 0
GPIORevision_Panda # 1 ; PandaBoard
GPIORevision_PandaES # 1 ; PandaBoard-ES
GPIOType_GPIO # 1 ; GPIO
GPIOType_I2C # 1 ; I2C bus SDA,SCL
GPIOType_GPCLK # 1 ; General Purpose Clock
GPIOType_SPI # 1 ; SPI bus MISO,MOSI,SCLK,CE
GPIOType_PWM # 1 ; Pulse Width Modulator
GPIOType_UART # 1 ; Serial bus TX,RX,CTS,RTS,DCD,DTR,DSR,RI
GPIOType_PCM # 1 ; PCM Audio CLK,FS,DIN,DOUT
GPIOType_BSC # 1 ; BSC bus SDA,SCL,MISO,CE
GPIOType_JTAG # 1 ; JTAG bus TRST,RTCK,TDO,TCK,TDI,TMS
GPIOType_USB # 1 ; USB D+,D-
GPIOType_LED # 1 ; Onboard LED
GPIOType_SW # 1 ; Onboard switch
; !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
; NOTE: The following GPIOType/GPIORevision pairs are due for
; retirement as they were only needed by the original 0.0 API
; !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
; iMx6 type and revision values:
......@@ -120,6 +119,7 @@ GPIOType_iMx6Q # 1 ; iMx6Quad
^ 0
GPIORevision_iMx6Q_WBrevB # 1 ; Initial development
GPIORevision_iMx6Q_WBrevC1 # 1 ; Subsequent
GPIORevision_iMx6Q_WBrevD # 1 ; Current
]
......
This diff is collapsed.
This diff is collapsed.
;
; Copyright (c) 2011, Tank Stage Lighting
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of the copyright holder nor the names of their
; contributors may be used to endorse or promote products derived from
; this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
; DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
; ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
;s.errors
;---------------------------------------------
initerror
ADR r0,initerrorrma
B errorcommon
initerror1
ADR r0,initerrorhardware
B errorcommon
initerror2
ADR r0,initerrormap1
B errorcommon
initerror3
ADR r0,initerrormap2
B errorcommon
initerror4
ADR r0,initerrormap3
B errorcommon
nomachinesupport
ADR r0,nomachineerror
B errorcommon
dieerror
ADR r0,dieerrorrma
B errorcommon
;---------------------------------------------
errorcommon
STR r0,[r13,#0] ;change r0 on stack
SETV
Pull "r0-r11,pc"
;---------------------------------------------
RM_errMesg
DCD Error_block
DCB "Unkown GPIO SWI operation",0
ALIGN
initerrorrma
DCD Error_block+1
DCB "The GPIO module could not claim RMA",0
ALIGN
initerrorhardware
DCD Error_block+2
DCB "The GPIO module had a problem with the hardware",0
ALIGN
initerrormap1
DCD Error_block+3
DCB "The GPIO module could not map in logical memory for the GPIO registers",0
ALIGN
initerrormap2
DCD Error_block+4
DCB "The GPIO module could not map in logical memory for the control registers",0
ALIGN
initerrormap3
DCD Error_block+5
DCB "The GPIO module could not map in logical memory for the SRAM",0
ALIGN
dieerrorrma
DCD Error_block+6
DCB "The GPIO module could not clear RMA",0
ALIGN
nomachineerror
DCD Error_block+7
DCB "The GPIO module does not support this SOC",0
ALIGN
initerrortick
DCD Error_block+8
DCB "The GPIO module could not claim TickerV",0
ALIGN
;---------------------------------------------
END
;
; Copyright (c) 2011, Tank Stage Lighting
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of the copyright holder nor the names of their
; contributors may be used to endorse or promote products derived from
; this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
; DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
; ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
GET Hdr:ListOpts
GET Hdr:Macros
GET Hdr:System
GET Hdr:ModHand
GET Hdr:GPIODevice
GET hdr.reals
GET VersionASM
GET ModHead.s
GET InitModule.s
GET KillModule.s
GET SupportCode.s
GET BeagleSWIs.s
GET I2CSWIs.s
GET PiSWIs.s
GET Errors.s
GET Tables.s
END
;
; Copyright (c) 2011, Tank Stage Lighting
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of the copyright holder nor the names of their
; contributors may be used to endorse or promote products derived from
; this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
; DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
; ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
;ReadData
;r0=GPIO number
i2c_Read_Data
Push "r1-r6,lr"
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r1-r6,pc",EQ ; restore registers and exit
BL i2c_get_things ;
MOV r2,#1 ;
ADD r1,r4,#mcpgpioa ;
BL i2c_read ;
Pull "r1-r6,pc",VS ;restore registers and exit if error
LDRB r0,[r1] ;
AND r0,r0,r5 ;mask pin
CMP r0,#0 ;
MOVNE r0,#1 ;
Pull "r1-r6,pc" ; restore registers and exit
;r0=value (0 or 1) -1 if not there
;---------------------------------------------
;WriteData
;r0=GPIO number
;r1=value
i2c_Write_Data
Push "r0-r8,lr" ;
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r0-r8,pc",EQ ; restore registers and exit
MOV r6,r0 ;
MOV r7,r1 ;
BL i2c_Read_Data ;
Pull "r1-r8,pc",VS ;restore registers and exit if error
MOV r0,r6 ;
ADD r4,r12,#i2creturn ;
LDRB r6,[r4] ;
BL i2c_get_things ;
ADD r1,r4,#mcpgpioa ;
CMP r7,#0 ;
BICEQ r2,r6,r5 ;
ORRNE r2,r6,r5 ;
BL i2c_write ;
Pull "r0-r8,pc" ; restore registers and exit
;---------------------------------------------
;ReadOE
;r0=GPIO number
i2c_Read_OE
Push "r1-r6,lr"
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r1-r6,pc",EQ ; restore registers and exit
BL i2c_get_things
MOV r2,#1 ;
ADD r1,r4,#mcpiodira ;
BL i2c_read ;
Pull "r1-r6,pc",VS ;restore registers and exit if error
LDRB r0,[r1] ;
AND r0,r0,r5 ;mask pin
CMP r0,#0 ;
MOVNE r0,#1 ;
Pull "r1-r6,pc" ; restore registers and exit
;r0=value (0 or 1) or -1 if not there
;---------------------------------------------
;WriteOE
;r0=GPIO number
;r1=value
i2c_Write_OE
Push "r1-r7,lr" ;
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r1-r7,pc",EQ ; restore registers and exit
MOV r6,r0 ;
MOV r7,r1 ;
BL i2c_Read_OE ;
MOV r0,r6 ;
ADD r4,r12,#i2creturn ;
LDRB r6,[r4] ;
BL i2c_get_things ;
ADD r1,r4,#mcpiodira ;
CMP r7,#0 ;
BICEQ r2,r6,r5 ;
ORRNE r2,r6,r5 ;
BL i2c_write ;
Pull "r1-r7,pc" ; restore registers and exit
;r0=old value or -1 if not there
;---------------------------------------------
;ReadMode
;WriteMode
;r0=GPIO number
;r1=value
i2c_Read_Mode
i2c_Write_Mode
Push "r1-r7,lr" ;
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r1-r7,pc",EQ ; restore registers and exit
MOV r0,#4 ; GPIO
Pull "r1-r7,pc" ; restore registers and exit
;r0=old value or -1 if not there
;---------------------------------------------
;r0=chip address (0-7)
i2c_ReadBlock
Push "r1-r9,lr" ;
AND r0,r0,#&7 ;
MOV r0,r0,LSL #4 ;point to first gpio of chip
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r1-r9,pc",EQ ; restore registers and exit
ADD r9,r0,#8 ;point to eighth gpio of chip
BL i2c_get_things ;
MOV r2,#1 ;
ADD r1,r4,#mcpgpioa ;
BL i2c_read ;
Pull "r1-r9,pc",VS ;restore registers and exit if error
LDRB r8,[r1] ;
MOV r0,r9 ;get second port readings
BL i2c_get_things ;
MOV r2,#1 ;
ADD r1,r4,#mcpgpioa ;
BL i2c_read ;
Pull "r1-r9,pc",VS ;restore registers and exit if error
LDRB r0,[r1] ;
MOV r0,r0,LSL#8 ;move up
ORR r0,r0,r8 ;add in 0-7 bits
Pull "r1-r9,pc" ; restore registers and exit
;r0=16 bits from chip or -1 if not there
;---------------------------------------------
;r0=chip address (0-7)
;r1=lower 16 bits of gpio i/o
i2c_WriteBlock
Push "r0-r8,lr" ;
AND r0,r0,#&7 ;
MOV r0,r0,LSL #4 ;point to first gpio of chip
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r0-r8,pc",EQ ; restore registers and exit
ADD r8,r0,#8 ;point to eighth gpio of chip
MOV r7,r1 ;save for later
BL i2c_get_things ;
ADD r1,r4,#mcpgpioa ;
AND r2,r7,#&FF ;just bottom 8
BL i2c_write ;
Pull "r0-r8,pc",VS ;restore registers and exit if error
MOV r0,r8 ;do next 8
BL i2c_get_things ;
ADD r1,r4,#mcpgpioa ;
MOV r7,r7,LSR #8 ;move down
AND r2,r7,#&FF ;just bottom 8
BL i2c_write ;
Pull "r0-r8,pc" ; restore registers and exit
;---------------------------------------------
;r0=chip address (0-7)
i2c_ReadBlockOE
Push "r1-r9,lr" ;
AND r0,r0,#&7 ;
MOV r0,r0,LSL #4 ;point to first gpio of chip
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r1-r9,pc",EQ ; restore registers and exit
ADD r9,r0,#8 ;point to eighth gpio of chip
BL i2c_get_things ;
MOV r2,#1 ;
ADD r1,r4,#mcpiodira ;
BL i2c_read ;
Pull "r1-r9,pc",VS ;restore registers and exit if error
LDRB r8,[r1] ;
MOV r0,r9 ;get second port readings
BL i2c_get_things ;
MOV r2,#1 ;
ADD r1,r4,#mcpiodira ;
BL i2c_read ;
Pull "r1-r9,pc",VS ;restore registers and exit if error
LDRB r0,[r1] ;
MOV r0,r0,LSL#8 ;move up
ORR r0,r0,r8 ;add in 0-7 bits
Pull "r1-r9,pc" ; restore registers and exit
;r0=16 bits from chip
;---------------------------------------------
;r0=chip address (0-7)
;r1=lower 16 bits of gpio oe
i2c_WriteBlockOE
Push "r0-r8,lr" ;
AND r0,r0,#&7 ;
MOV r0,r0,LSL #4 ;point to first gpio of chip
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r0-r8,pc",EQ ; restore registers and exit
ADD r8,r0,#8 ;point to eighth gpio of chip
MOV r7,r1 ;save for later
BL i2c_get_things ;
ADD r1,r4,#mcpiodira ;
AND r2,r7,#&FF ;just bottom 8
BL i2c_write ;
Pull "r0-r8,pc",VS ;restore registers and exit if error
MOV r0,r8 ;do next 8
BL i2c_get_things ;
ADD r1,r4,#mcpiodira ;
MOV r7,r7,LSR #8 ;move down
AND r2,r7,#&FF ;just bottom 8
BL i2c_write ;
Pull "r0-r8,pc" ; restore registers and exit
;---------------------------------------------
;r0=port address (0-15)
i2c_ReadByte
Push "r1-r9,lr" ;
AND r0,r0,#&15 ;
MOV r0,r0,LSL #3 ;point to first gpio of port
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r1-r9,pc",EQ ; restore registers and exit
BL i2c_get_things ;
MOV r2,#1 ;
ADD r1,r4,#mcpgpioa ;
BL i2c_read ;
Pull "r1-r9,pc",VS ;restore registers and exit if error
LDRB r0,[r1] ;
Pull "r1-r9,pc" ; restore registers and exit
;r0=8 bits from chip or -1 if not there
;---------------------------------------------
;r0=port address (0-15)
;r1=lower 8 bits of gpio i/o
i2c_WriteByte
Push "r0-r8,lr" ;
AND r0,r0,#&15 ;
MOV r0,r0,LSL #3 ;point to first gpio of port
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r0-r8,pc",EQ ; restore registers and exit
MOV r7,r1 ;save for later
BL i2c_get_things ;
ADD r1,r4,#mcpgpioa ;
AND r2,r7,#&FF ;just bottom 8
BL i2c_write ;
Pull "r0-r8,pc" ; restore registers and exit
;---------------------------------------------
;r0=port address (0-15)
i2c_ReadByteOE
Push "r1-r9,lr" ;
AND r0,r0,#&15 ;
MOV r0,r0,LSL #3 ;point to first gpio of port
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r1-r9,pc",EQ ; restore registers and exit
BL i2c_get_things ;
MOV r2,#1 ;
ADD r1,r4,#mcpiodira ;
BL i2c_read ;
Pull "r1-r9,pc",VS ;restore registers and exit if error
LDRB r0,[r1] ;
Pull "r1-r9,pc" ; restore registers and exit
;r0=8 bits from chip
;---------------------------------------------
;r0=port address (0-15)
;r1=lower 16 bits of gpio oe
i2c_WriteByteOE
Push "r0-r8,lr" ;
AND r0,r0,#&15 ;
MOV r0,r0,LSL #3 ;point to first gpio of port
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r0-r8,pc",EQ ; restore registers and exit
MOV r7,r1 ;save for later
BL i2c_get_things ;
ADD r1,r4,#mcpipola ;
AND r2,r7,#&FF ;just bottom 8
BL i2c_write ;
Pull "r0-r8,pc" ; restore registers and exit
;---------------------------------------------
i2c_Read_Polarity
Push "r1-r6,lr"
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r1-r6,pc",EQ ; restore registers and exit
BL i2c_get_things
MOV r2,#1 ;
ADD r1,r4,#mcpipola ;
BL i2c_read ;
Pull "r1-r6,pc",VS ;restore registers and exit if error
LDRB r0,[r1] ;
AND r0,r0,r5 ;mask pin
CMP r0,#0 ;
MOVNE r0,#1 ;
Pull "r1-r6,pc" ; restore registers and exit
;r0=value (0 or 1) or -1 if not there
;---------------------------------------------
i2c_Write_Polarity
Push "r1-r7,lr" ;
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r1-r7,pc",EQ ; restore registers and exit
MOV r6,r0 ;
MOV r7,r1 ;
BL i2c_Read_Polarity ;
MOV r0,r6 ;
ADD r4,r12,#i2creturn ;
LDRB r6,[r4] ;
BL i2c_get_things ;
ADD r1,r4,#mcpipola ;
CMP r7,#0 ;
BICEQ r2,r6,r5 ;
ORRNE r2,r6,r5 ;
BL i2c_write ;
Pull "r1-r7,pc" ; restore registers and exit
;r0=old value or -1 if not there
;---------------------------------------------
i2c_Read_Pull
Push "r1-r6,lr"
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r1-r6,pc",EQ ; restore registers and exit
BL i2c_get_things
MOV r2,#1 ;
ADD r1,r4,#mcpgppua ;
BL i2c_read ;
Pull "r1-r6,pc",VS ;restore registers and exit if error
LDRB r0,[r1] ;
AND r0,r0,r5 ;mask pin
CMP r0,#0 ;
MOVNE r0,#1 ;
Pull "r1-r6,pc" ; restore registers and exit
;r0=value (0 or 1) or -1 if not there
;---------------------------------------------
i2c_Write_Pull
Push "r1-r7,lr" ;
BL i2c_checkifinrange ;
CMP r0,#-1 ;
Pull "r1-r7,pc",EQ ; restore registers and exit
MOV r6,r0 ;
MOV r7,r1 ;
BL i2c_Read_Pull ;
MOV r0,r6 ;
ADD r4,r12,#i2creturn ;
LDRB r6,[r4] ;
BL i2c_get_things ;
ADD r1,r4,#mcpgppua ;
CMP r7,#0 ;
BICEQ r2,r6,r5 ;
ORRNE r2,r6,r5 ;
BL i2c_write ;
Pull "r1-r7,pc" ; restore registers and exit
;r0=old value or -1 if not there
;---------------------------------------------
i2c_GPIO_Info
Push "r3-r8,lr" ;
LDR r2,[r12,#i2cprotect] ;
CMP r2,#0 ;i2c protected ?
MOVEQ r0,#-1 ;
MOVEQ r1,#-1 ;return error code
Pull "r3-r8,pc",EQ ;
LDR r0,[r12,#i2clowgpio] ;
LDR r1,[r12,#i2chighgpio] ;
LDR r2,[r12,#machine] ;get machine type
ADRL r8,i2c_bus_nos ;get i2c bus used
LDRB r2,[r10,r2] ;
Pull "r3-r8,pc" ; restore registers and exit
;r0=lowest i2c gpio available
;r1=highest gpio available
;r2=bus number used on machine
;OR r0+r1=-1 i2c not protected
;OR r0=-1 and r1=0 no i2c gpio chips fitted
;---------------------------------------------
;r0 pointer to list
i2c_ReadConfig
Push "r1-r10,lr" ;
MOV r4,r0
LDR r0,[r12,#i2clowgpio] ;lowest i2c gpio
LDR r1,[r12,#i2chighgpio] ;highest
CMP r0,#-1 ;non fitted/last
MOVEQ r0,r4
Pull "r1-r10,pc",EQ ;
ORR r0,r0,#i2c_flag ;
ORR r1,r1,#i2c_flag ;
10 MOV r5,r0 ;save gpio
BL i2c_Read_OE ;
CMP r0,#1 ;
MOVEQ r0,#conf_io ;
ORR r6,r5,r0 ;
MOV r0,#0 ;not extended
ORR r6,r6,r0,LSR #8 ;
ORR r6,r6,#i2c_flag ;
STR r6,[r4],#4 ;
ADD r0,r5,#1 ;
CMP r0,r1 ;
BLE %BT10 ;
MOV r0,r4 ;pass pointer back
Pull "r1-r10,pc" ;
;r0 pointer to list
;---------------------------------------------
;r0=gpio number
i2c_checkifinrange
Push "r1-r4,lr"
MOV r4,r0 ;save for later
BL i2c_GPIO_Info ;r0=lowest,r1=highest,r2+r3=corrupt
CMP r0,#-1 ;
Pull "r1-r4,pc",EQ ;get out with error
AND r3,r4,#&FF ;just gpio number
CMP r3,r0 ;check against lowest
MOVLT r0,#-1 ;
Pull "r1-r4,pc",LT ;get out with error
CMP r3,r1 ;check against highest
MOVGT r0,#-1 ;
Pull "r1-r4,pc",GT ;get out with error
MOV r0,r4 ;
Pull "r1-r4,pc" ;
;r0=-1 if error or preserved if ok
;---------------------------------------------
END
;
; Copyright (c) 2011, Tank Stage Lighting
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of the copyright holder nor the names of their
; contributors may be used to endorse or promote products derived from
; this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
; DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
; ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
;s.InitModule
[ :LNOT::DEF: ROM
GBLL ROM
ROM SETL {FALSE}
]
[ :LNOT: ROM
IMPORT |__RelocCode| ; Link symbol for relocation routine
]
;******************************************************************************
;
; RM_Init - Initialisation entry point
;
RM_Init
Push "r0-r11,lr"
[ :LNOT: ROM
BL |__RelocCode| ; initialise absolute code pointers
]
MOV r0,#ModHandReason_Claim ;
LDR r3,maxRMA ;
SWI XOS_Module ;
BVS initerror ;
STR r2,[r12] ; save RMA pointer
MOV r12,r2 ;
ADD r0,r2,#MainTemp ; Clear only lower bits
MOV r1,#0 ;