Support 64bit physical addresses
If the SATA controller supports 64bit addresses, and the OS reports that there's RAM above the 4GB physical barrier, use the 64bit phys addr version of OS_Memory 19 for DMA preparation / log->phys conversion.
Tested on 4GB IGEPv5 & Titanium. However transfers with 64bit phys addrs haven't actually been tested (the SATA controller in the OMAP5 does claim to support 64bit phys addresses, but the OMAP5 bus/interconnect only allows the controller to access the low 4GB of the address space, so OS_Memory 19 is automatically forcing transfers to/from high RAM to use a low-RAM bounce buffer instead).
Requires RiscOS/Sources/Kernel!53 (merged) to build correctly.