Commit 44c94d2d authored by Robert Sprowson's avatar Robert Sprowson

Run SMPS12 in multiphase mode all the time

This is equivalent to the change made
  https://github.com/elesar-uk/u-boot/commit/47f4a273bd76ff135f692a28278ed8eec69ad417
to share the work between SMPS1/2 (the outputs are wired together via L800/802).

Version 0.05. Tagged as 'Titanium-0_05'
parent cfddc049
/* (0.04)
/* (0.05)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.04
#define Module_MajorVersion_CMHG 0.05
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 12 Sep 2017
#define Module_Date_CMHG 25 Jan 2018
#define Module_MajorVersion "0.04"
#define Module_Version 4
#define Module_MajorVersion "0.05"
#define Module_Version 5
#define Module_MinorVersion ""
#define Module_Date "12 Sep 2017"
#define Module_Date "25 Jan 2018"
#define Module_ApplicationDate "12-Sep-17"
#define Module_ApplicationDate "25-Jan-18"
#define Module_ComponentName "Titanium"
#define Module_ComponentPath "cddl/RiscOS/Sources/HAL/Titanium"
#define Module_FullVersion "0.04"
#define Module_HelpVersion "0.04 (12 Sep 2017)"
#define Module_LibraryVersionInfo "0:4"
#define Module_FullVersion "0.05"
#define Module_HelpVersion "0.05 (25 Jan 2018)"
#define Module_LibraryVersionInfo "0:5"
......@@ -109,6 +109,18 @@ SMPS9_CTRL # 1
SMPS9_VOLTAGE # 1
# 8
SMPS_CTRL # 1
SMPS_CTRL_SMPS45_SMPS457_EN * 1:SHL:5
SMPS_CTRL_SMPS12_SMPS123_EN * 1:SHL:4
SMPS_CTRL_SMPS45_PHASE_CTRL_SHIFT * 2
SMPS_CTRL_SMPS45_PHASE_CTRL_MASK * 3:SHL:SMPS_CTRL_SMPS45_PHASE_CTRL_SHIFT
SMPS_CTRL_SMPS45_PHASE_CTRL_AUTO * 0:SHL:SMPS_CTRL_SMPS45_PHASE_CTRL_SHIFT
SMPS_CTRL_SMPS45_PHASE_CTRL_SINGLE * 1:SHL:SMPS_CTRL_SMPS45_PHASE_CTRL_SHIFT
SMPS_CTRL_SMPS45_PHASE_CTRL_DOUBLE * 2:SHL:SMPS_CTRL_SMPS45_PHASE_CTRL_SHIFT
SMPS_CTRL_SMPS123_PHASE_CTRL_SHIFT * 0
SMPS_CTRL_SMPS123_PHASE_CTRL_MASK * 3:SHL:SMPS_CTRL_SMPS123_PHASE_CTRL_SHIFT
SMPS_CTRL_SMPS123_PHASE_CTRL_AUTO * 0:SHL:SMPS_CTRL_SMPS123_PHASE_CTRL_SHIFT
SMPS_CTRL_SMPS123_PHASE_CTRL_SINGLE * 1:SHL:SMPS_CTRL_SMPS123_PHASE_CTRL_SHIFT
SMPS_CTRL_SMPS123_PHASE_CTRL_DOUBLE * 2:SHL:SMPS_CTRL_SMPS123_PHASE_CTRL_SHIFT
SMPS_PD_CTRL # 1
# 1
SMPS_THERMAL_EN # 1
......
......@@ -133,6 +133,16 @@ CPUClkDeviceInit ROUT
TEQNE a1, v1
Pull "v1, pc", NE
; Run SMPS12 in multiphase mode all the time to avoid stressing
; one of the two controllers. This powers the MPU, so there's never a
; no load situation to worry about.
LDR a1, =SMPS_CTRL
BL PMICReadByte
BIC a1, a1, #SMPS_CTRL_SMPS123_PHASE_CTRL_MASK
ORR a2, a1, #SMPS_CTRL_SMPS123_PHASE_CTRL_DOUBLE
LDR a1, =SMPS_CTRL
BL PMICWriteByte
; The default HAL clock for MPU uses OPPNOM so set the PMIC to match
; that value now in case someone's unplugged the Portable module.
; This is the safest approach since OPPNOM is the lowest common setting that
......
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