Commits (13)
  • Jeffrey Lee's avatar
    Add additional memory barriers · 61d60f30
    Jeffrey Lee authored
    Detail:
      s/SDMA - Add extra memory barriers to DMA code, ready for when the default NCB memory cache policy is changed from Device to Normal, non-cacheable (increased risk of out-of-order accesses)
      s/PL310 - Add DMB ST implementation that also deals with PL310 synchronisation
    Admin:
      Tested on PandaBoard
    
    
    Version 0.46. Tagged as 'OMAP4-0_46'
    61d60f30
  • ROOL's avatar
    Minor OMAP4 tidying · ea55eb8c
    ROOL authored
    omap4430.hdr/Debug,s:
      Define a dummy symbol so when debug is enabled there aren't conflicting IMPORT and EXPORTs.
    PRCM.s:
      Fill in missing frequency.
    Boot.s:
      Update comment to match HAL function names.
    NVMemory.s:
      Add offset to account for FATLoadedCMOS not being at offset 0.
    Top.s:
      Remove unused Post header. Replace DCI with instruction now objasm supports it.
    Submission from Willi Theiss.
    
    Version 0.47. Tagged as 'OMAP4-0_47'
    ea55eb8c
  • ROOL's avatar
    Remove stubbed out HAL entries · 979e0aac
    ROOL authored
    Detail:
      There's no need to provide an empty implementation, just use NullEntry.
    Admin:
      Submission from Willi Theiss.
    
    Version 0.48. Tagged as 'OMAP4-0_48'
    979e0aac
  • ROOL's avatar
    Extend to support CPUClk device 0.2 API · a2527ec0
    ROOL authored
    Detail:
      Extra entry to get the die temperature, as reported by Portable_ReadSensor(0,0,0).
    Admin:
      Submission from Willi Theiss.
      Tested on OMAP4430 and OMAP4460.
    
    Version 0.49. Tagged as 'OMAP4-0_49'
    a2527ec0
  • ROOL's avatar
    Add HAL_PlatformName implementation · c8996882
    ROOL authored
    Detail:
      Return the board name for this entry.
      Rename CPU temperature sensor register per datasheet.
    Admin:
      Submission from Willi Theiss.
      Not tested.
    
    Version 0.50. Tagged as 'OMAP4-0_50'
    c8996882
  • Jeffrey Lee's avatar
    Implement HAL_TimerIRQClear · e25abc64
    Jeffrey Lee authored
    Detail:
      s/Boot, s/Interrupts, s/Timers - Move timer IRQ clear code out of HAL_IRQClear and into HAL_TimerIRQClear. Streamlines HAL_IRQClear, and necessary to avoid undefined symbols when linking with latest HAL USB library
    Admin:
      Builds, untested
    
    
    Version 0.51. Tagged as 'OMAP4-0_51'
    e25abc64
  • Jeffrey Lee's avatar
    GET Hdr:CPU.Arch · b4214424
    Jeffrey Lee authored
    Detail:
      s/SDIO - Add a GET of Hdr:CPU.Arch, as it's now required for DivRem usage
    Admin:
      Untested
    
    
    Version 0.52. Tagged as 'OMAP4-0_52'
    b4214424
  • ROOL's avatar
    Build fix · c465a5ce
    ROOL authored
    Admin:
      As a side effect of changes in USBDriver-1_20, rename the library object.
    
    Version 0.53. Tagged as 'OMAP4-0_53'
    c465a5ce
  • ROOL's avatar
    Participate in keyboard scan dependencies · cd2f6a7c
    ROOL authored
    Detail:
      Replace keyboard scan code with list of modules that the kernel needs to do the same.
      Reorder the HALEntries to match Kernel-5_89.
      Delete unused workspace.
      Don't link against HAL USB library.
    Admin:
      Submission for USB bounty.
    
    Version 0.54. Tagged as 'OMAP4-0_54'
    cd2f6a7c
  • ROOL's avatar
    Use continuous conversion for faster ADC results · 5addcb56
    ROOL authored
    Detail:
      Added check for already running conversion in SR44x_GetDieTempES use continuous conversion mode in SR44x_GetDieTemp to reduce waiting phases.
    Admin:
      Submission from Willi Theiss.
    
    Version 0.55. Tagged as 'OMAP4-0_55'
    5addcb56
  • Robert Sprowson's avatar
    Make type and revision private · 35c39f36
    Robert Sprowson authored
    Adopt the board type and revision enum privately in board.hdr (mass search & replace exercise).
    Don't re-export it via a stub GPIO device; it's private.
    
    Version 0.56. Tagged as 'OMAP4-0_56'
    35c39f36
  • ROOL's avatar
    Comment and workspace tidy up · 404fe8c0
    ROOL authored
    Detail:
      SDIO.s comment correction
      hdr/StaticWS removed unused USBAllocArea
    Admin:
      Submission from Willi Theiss.
    
    Version 0.57. Tagged as 'OMAP4-0_57'
    404fe8c0
  • Robert Sprowson's avatar
    Add GPIO device implementation · faf92036
    Robert Sprowson authored
    Update to API 1.0, and corresponding set of register wide accessor functions.
    The tables of permitted pins come from staring at the schematics for any connectors, minus those that are "owned" by the OS.
    
    Tested on a Pandaboard, toggling the two user LEDs and scanning the 'USER' push button (which, by the way, needs the pullup enabling as there isn't a discrete one).
    
    Version 0.58. Tagged as 'OMAP4-0_58'
    faf92036
......@@ -17,8 +17,7 @@
COMPONENT = OMAP-4 HAL
TARGET = OMAP4
OBJS = Top Boot Interrupts Timers CLib CLibAsm Stubs UART Debug PRCM Video USB I2C RTC SDMA TPS Audio GPIO GPMC NVMemory KbdScan SDIO SR44x PowerCtrl PL310
USBDIR = <Lib$Dir>.USB
OBJS = Top Boot Interrupts Timers CLib CLibAsm UART Debug PRCM Video USB I2C RTC SDMA TPS Audio GPIO GPMC NVMemory KbdScan SDIO SR44x PowerCtrl PL310
HDRS =
CMHGFILE =
......@@ -33,7 +32,6 @@ include CModule
CCFLAGS += -ff -APCS 3/32bit/nofp/noswst
ASFLAGS += -APCS 3/nofp/noswst
ROM_LIBS += ${USBDIR}.o.EHCIDriver ${USBDIR}.o.USBDriver
resources:
@${ECHO} ${COMPONENT}: no resources
......
/* (0.45)
/* (0.58)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.45
#define Module_MajorVersion_CMHG 0.58
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 16 Apr 2015
#define Module_Date_CMHG 01 Apr 2018
#define Module_MajorVersion "0.45"
#define Module_Version 45
#define Module_MajorVersion "0.58"
#define Module_Version 58
#define Module_MinorVersion ""
#define Module_Date "16 Apr 2015"
#define Module_Date "01 Apr 2018"
#define Module_ApplicationDate "16-Apr-15"
#define Module_ApplicationDate "01-Apr-18"
#define Module_ComponentName "OMAP4"
#define Module_ComponentPath "castle/RiscOS/Sources/HAL/OMAP4"
#define Module_FullVersion "0.45"
#define Module_HelpVersion "0.45 (16 Apr 2015)"
#define Module_LibraryVersionInfo "0:45"
#define Module_FullVersion "0.58"
#define Module_HelpVersion "0.58 (01 Apr 2018)"
#define Module_LibraryVersionInfo "0:58"
......@@ -59,7 +59,8 @@ GPIO_CLEARDATAOUT * &190
GPIO_SETDATAOUT * &194
GPIO_PIN_MAX * 192
GPIO_PORT_MAX * 6
GPIO_PIN_MAX * (32 * GPIO_PORT_MAX)
; Flags for GPIOx_SetAndEnableIRQ
GPIO_LEVELDETECT0_FLAG * 1
......
This diff is collapsed.
; Copyright 2011 Castle Technology Ltd
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
; http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;
;
; Control bitmasks used to indicate results of test to RISCOS
;
R_SOFT * 0 ; not a power-on reset
R_HARD * 1 ; Self-test run due to POR
R_EXTERN * 2 ; external tests performed
R_TESTED * 4 ; Self-test run due to test link
R_MEMORY * 8 ; Memory has been tested
R_ARM3 * &10 ; read ARM id
R_MEMSKIP * &20 ; long memory test disabled
R_IOEB * &40 ; PC-style IO controller (A5000)
R_IOMD * &40 ; PC-style IO controller (RiscPC, ARM7500)
R_VRAM * &80 ; VRAM present
R_STATUS * &1ff ; bits that aren't a fatal fault
R_CHKFAILBIT * &100 ; CMOS contents failed checksum
R_ROMFAILBIT * &200 ; ROM failed checksum
R_CAMFAILBIT * &400 ; CAM failed
R_PROFAILBIT * &800 ; MEMC protection failed
R_IOCFAILBIT * &1000 ; IOC register test failed
R_INTFAILBIT * &2000 ; Cannot clear interrupts
R_VIDFAILBIT * &4000 ; VIDC flyback failure
R_SNDFAILBIT * &8000 ; Sound DMA failure
R_CMSFAILBIT * &10000 ; CMOS unreadable
R_LINFAILBIT * &20000 ; Page zero RAM failure
R_MEMFAILBIT * &40000 ; Main RAM test failure
R_CACFAILBIT * &80000 ; ARM 3 Cache test failure
;
; Define Long, Equal and short flash delays
;
ts_Long_Flash * &03 ; Number of 1/4 Sec delays for a long flash
ts_Short_Flash * &01 ; Number of 1/4 Sec delays for a short flash
ts_Equal_Flash * &02 ; Number of 1/4 Sec delays for a equal flash
ts_Fail_Flash_Delay * &14 ; Number of Flash Cycles for a Fail, with adaptor
ts_Pass_Flash_Delay * &0A ; Number of Flash Cycles for a Pass, with adaptor
END
......@@ -137,6 +137,9 @@ OMAP44XX_CONTROL_FUSE_CORE_OPP50 * &0254
OMAP44XX_CONTROL_FUSE_CORE_OPP100 * &0257
OMAP44XX_CONTROL_FUSE_CORE_OPP119 * &025A
; CPU die temperature related register - relative to L4_SYSCTRL_GENERAL_CORE
CONTROL_TEMP_SENSOR * &032C
; IRQs
SR1_IRQ * OMAP44XX_IRQ_SR_MPU
......@@ -170,7 +173,7 @@ SR44x_OPPTbl_Max * 5 ; Max number of entries we support
; Workspace
^ 0, a1
; Public bits
SR44xDevice # HALDevice_CPUClk_Size_0_1 ; support API 0.1
SR44xDevice # HALDevice_CPUClk_Size_0_2 ; support API 0.2
; Private bits
SR44xWorkspace # 4 ; HAL workspace pointer
SR44xNewSpeed # 4 ; Re-entrancy flag. -1 if idle, desired table idx if in process of
......
......@@ -22,7 +22,6 @@
GET hdr.I2C
GET hdr.board
GET hdr.SR44x
GET <Lib$$Dir>.USB.hdr.usbhal
GET Hdr:SDHCIDevice
GET Hdr:RTCDevice
GET Hdr:GPIODevice
......@@ -112,8 +111,6 @@ NCNBAllocNext # 4 ; next free address in ncnb workspace
DMAPktSz_Audio # 4 ; DMA packet size to use for audio transfers (McPDM DL)
USBHAL_WS # USBHAL_WS_Size ; USB workspace for keyboard scan
SDMAWS # SDMA_WorkspaceSize
VideoDevice # Video_DeviceSize
......@@ -121,23 +118,13 @@ VideoBoardConfig # VideoBoardConfig_Size
AudioWS # Audio_WorkspaceSize
CPUClkWS # SR44x_WorkspaceSize
GPIOWS # HALDevice_GPIO_Size
GPIOWS # 6 * (HALDevice_GPIO_Size_1_0 + (2*4))
NVRAMWS # HALDeviceSize
RTCWS # RTCSize
SDIOWS # SDHCISize * MaxSDControllers
PL310Device # HALDeviceSize
; align on 16 byte boundary
# (((:INDEX:@)+15):AND::NOT:15)-(:INDEX:@)
USBAllocAreaSize * 16*1024
; With an ordinary setup, about half of this memory gets used.
; About 3K goes to some big allocs (looks like the bus structs)
USBAllocArea # USBAllocAreaSize
HAL_WsSize * :INDEX:@
......
......@@ -59,6 +59,13 @@ MachID_OMAP35xEVM * 1535
MachID_OMAP4430SDP * 2160
MachID_PandaBoard * 2791
; Enumerations of the board type, and any minor revisions within that type
^ 0
BoardType_OMAP4_Panda # 1 ; It's a PandaBoard or PandaBoard-ES
^ 0
BoardRevision_Panda # 1 ; PandaBoard
BoardRevision_PandaES # 1 ; PandaBoard-ES
; todo - SDRC register settings? function pointers for more flexible setup?
; (board revision detection, USB PHY, DVI framer, HAL devices, etc.)
......
......@@ -253,7 +253,7 @@ HAWKEYE_OMAP4460_ES10 * &B94E ; OMAP4460 ES1.0 and ES1.1
REVISION_OMAP4460_ES10 * 0 ; x
REVISION_OMAP4460_ES11 * 2 ; x
[ Debug
[ Debug :LAND: :LNOT: :DEF: DebugExported
IMPORT DebugHALPrint
IMPORT DebugHALPrintReg
IMPORT DebugHALPrintByte
......
......@@ -158,7 +158,7 @@ HALdescriptor DATA
IMPORT GPMC_Init
IMPORT GPIO_Init
IMPORT GPIOx_SetAsOutput
IMPORT GPIO_InitDevice
IMPORT GPIO_InitDevices
IMPORT SDIO_InitDevices
IMPORT NVMemory_Init
IMPORT NVMemory_InitDevice
......@@ -187,6 +187,7 @@ HALdescriptor DATA
IMPORT HAL_TimerSetPeriod
IMPORT HAL_TimerPeriod
IMPORT HAL_TimerReadCountdown
IMPORT HAL_TimerIRQClear
IMPORT HAL_CounterRate
IMPORT HAL_CounterPeriod
......@@ -233,12 +234,7 @@ HALdescriptor DATA
IMPORT HAL_DebugRX
IMPORT HAL_DebugTX
IMPORT HAL_ATAControllerInfo
IMPORT HAL_KbdScanSetup
IMPORT HAL_KbdScan
IMPORT HAL_KbdScanFinish
IMPORT HAL_KbdScanInterrupt
IMPORT HAL_KbdScanDependencies
IMPORT HAL_USBControllerInfo
......@@ -287,29 +283,29 @@ HAL_EntryTable DATA
HALEntry HAL_IICTransfer
HALEntry HAL_IICMonitorTransfer
NullEntry ; HALEntry HAL_VideoFlybackDevice
NullEntry ; HALEntry HAL_VideoSetMode
NullEntry ; HALEntry HAL_VideoWritePaletteEntry
NullEntry ; HALEntry HAL_VideoWritePaletteEntries
NullEntry ; HALEntry HAL_VideoReadPaletteEntry
NullEntry ; HALEntry HAL_VideoSetInterlace
NullEntry ; HALEntry HAL_VideoSetBlank
NullEntry ; HALEntry HAL_VideoSetPowerSave
NullEntry ; HALEntry HAL_VideoUpdatePointer
NullEntry ; HALEntry HAL_VideoSetDAG
NullEntry ; HALEntry HAL_VideoVetMode
NullEntry ; HALEntry HAL_VideoPixelFormats
NullEntry ; HALEntry HAL_VideoFeatures
NullEntry ; HALEntry HAL_VideoBufferAlignment
NullEntry ; HALEntry HAL_VideoOutputFormat
NullEntry ; HALEntry HAL_MatrixColumns
NullEntry ; HALEntry HAL_MatrixScan
NullEntry ; HALEntry HAL_TouchscreenType
NullEntry ; HALEntry HAL_TouchscreenRead
NullEntry ; HALEntry HAL_TouchscreenMode
NullEntry ; HALEntry HAL_TouchscreenMeasure
NullEntry ; HAL_VideoFlybackDevice
NullEntry ; HAL_VideoSetMode
NullEntry ; HAL_VideoWritePaletteEntry
NullEntry ; HAL_VideoWritePaletteEntries
NullEntry ; HAL_VideoReadPaletteEntry
NullEntry ; HAL_VideoSetInterlace
NullEntry ; HAL_VideoSetBlank
NullEntry ; HAL_VideoSetPowerSave
NullEntry ; HAL_VideoUpdatePointer
NullEntry ; HAL_VideoSetDAG
NullEntry ; HAL_VideoVetMode
NullEntry ; HAL_VideoPixelFormats
NullEntry ; HAL_VideoFeatures
NullEntry ; HAL_VideoBufferAlignment
NullEntry ; HAL_VideoOutputFormat
NullEntry ; HAL_MatrixColumns
NullEntry ; HAL_MatrixScan
NullEntry ; HAL_TouchscreenType
NullEntry ; HAL_TouchscreenRead
NullEntry ; HAL_TouchscreenMode
NullEntry ; HAL_TouchscreenMeasure
HALEntry HAL_MachineID
......@@ -317,7 +313,7 @@ HAL_EntryTable DATA
HALEntry HAL_HardwareInfo
HALEntry HAL_SuperIOInfo
HALEntry HAL_PlatformInfo
NullEntry ; HALEntry HAL_CleanerSpace
NullEntry ; HAL_CleanerSpace
HALEntry HAL_UARTPorts
HALEntry HAL_UARTStartUp
......@@ -338,8 +334,7 @@ HAL_EntryTable DATA
HALEntry HAL_UARTModemControl
HALEntry HAL_UARTModemStatus
HALEntry HAL_UARTDevice
HALEntry HAL_Reset
HALEntry HAL_UARTDefault
HALEntry HAL_DebugRX
HALEntry HAL_DebugTX
......@@ -355,39 +350,39 @@ HAL_EntryTable DATA
NullEntry ; HAL_PCISlotTable
NullEntry ; HAL_PCIAddresses
HALEntry HAL_ATAControllerInfo
NullEntry ; HAL_ATASetModes
NullEntry ; HAL_ATACableID
HALEntry HAL_PlatformName
NullEntry ; Unused
NullEntry ; Unused
HALEntry HAL_InitDevices
HALEntry HAL_KbdScanSetup
HALEntry HAL_KbdScan
HALEntry HAL_KbdScanFinish
HALEntry HAL_KbdScanInterrupt
HALEntry HAL_KbdScanDependencies
NullEntry ; Unused
NullEntry ; Unused
NullEntry ; Unused
HALEntry HAL_PhysInfo
HALEntry HAL_USBControllerInfo
HALEntry HAL_Reset
HALEntry HAL_IRQMax
NullEntry ; HAL_VideoRender
HALEntry HAL_USBControllerInfo
NullEntry ; HAL_USBPortPower
NullEntry ; HAL_USBPortStatus
NullEntry ; HAL_USBPortIRQStatus
NullEntry ; HAL_USBPortIRQClear
NullEntry ; HAL_USBPortDevice
HALEntry HAL_VideoIICOp
NullEntry ; HAL_TimerIRQClear
HALEntry HAL_TimerIRQClear
NullEntry ; HAL_TimerIRQStatus
HALEntry HAL_ExtMachineID
NullEntry ; HAL_VideoFramestoreAddress
HALEntry HAL_UARTDefault
NullEntry ; HAL_VideoRender
NullEntry ; HAL_VideoStartupMode
NullEntry ; HAL_VideoPixelFormatList
HALEntry HAL_VideoIICOp
HAL_Entries * (. - HAL_EntryTable) / 4
......@@ -724,11 +719,11 @@ Board_InitDevices_Panda
LDR v2, =HAWKEYE_OMAP4460_ES10
UBFX a2, a2, #12, #16
CMP v2, a2
MOV a1, #GPIOType_OMAP4_Panda
MOVNE a2, #GPIORevision_Panda
MOVEQ a2, #GPIORevision_PandaES
MOV a1, #BoardType_OMAP4_Panda
MOVNE a2, #BoardRevision_Panda
MOVEQ a2, #BoardRevision_PandaES
Push "a1-a2"
BL GPIO_InitDevice
BL GPIO_InitDevices
; SD needs the same parameters to configure the device correctly
Pull "a1-a2"
BL SDIO_InitDevices
......@@ -748,6 +743,10 @@ HAL_HardwareInfo
STR ip, [a3]
MOV pc, lr
HAL_PlatformName
ADD a1, sb, #BoardConfig_Name
MOV pc, lr
HAL_PlatformInfo
LDRB ip, [sb, #BoardConfig_BoardFlags]
STR ip, [a2]
......
......@@ -22,6 +22,8 @@
GET Hdr:OSEntries
; prevent incompatible debug definitions from central header file
GBLL DebugExported
GET hdr.omap4430
GET hdr.UART
GET hdr.StaticWS
......
This diff is collapsed.
......@@ -24,7 +24,6 @@
GET hdr.omap4430
GET hdr.StaticWS
GET hdr.Interrupts
GET hdr.Timers
AREA |Asm$$Code|, CODE, READONLY, PIC
......@@ -192,9 +191,6 @@ HAL_IRQDisable
Pull "pc"
HAL_IRQClear
; This routine is also used to clear the timer interrupts
; It must also restart the INTC priority sorting, as it is called after every
; OS IRQ handler silences the interrupting device
[ ExtraDebugInterrupts
LDR a2, ExtraDebugIRQEnabled
CMP a2, #0
......@@ -204,14 +200,6 @@ HAL_IRQClear
Pull "lr"
10
]
SUB a2, a1, #TIMER_IRQ_BASE
CMP a2, #TIMER_MAX
BHS %FT10
LDR a3, Timers_Log
ADD a3, a3, a2, LSL #TIMER_STRIDE_POW2
MOV a2, #7 ; Clear all interrupts
STR a2, [a3, #GPT_IRQSTATUS]
10
; Signal End Of Interrupt
LDR a2, MPU_INTC_Log
STR a1, [a2, #(MPU_INTC_CPU + GIC_CPU_EOI)]
......
......@@ -17,95 +17,19 @@
GET Hdr:ListOpts
GET Hdr:Macros
GET Hdr:System
GET Hdr:Machine.<Machine>
GET Hdr:ImageSize.<ImageSize>
GET Hdr:Proc
GET Hdr:OSEntries
GET hdr.omap4430
GET hdr.StaticWS
GET hdr.UART
GET Hdr:HALEntries
AREA |Asm$$Code|, CODE, READONLY, PIC
EXPORT HAL_KbdScanSetup
EXPORT HAL_KbdScan
EXPORT HAL_KbdScanFinish
EXPORT HAL_KbdScanInterrupt
EXPORT USBHAL_WorkspaceOffset
EXPORT USBHAL_OSentriesOffset
IMPORT USBHAL_Init
IMPORT USBHAL_KbdScan
IMPORT USBHAL_KbdScanInterrupt
IMPORT USBHAL_Shutdown
; ATM MUSB stuff is OMAP3 only
; IMPORT USBHAL_MUSBDriver_Init
IMPORT USBHAL_EHCIDriver_Init
GBLL KbdDebug
KbdDebug SETL {FALSE} :LAND: Debug
; These constants are used by the USB libraries
USBHAL_WorkspaceOffset * :INDEX:USBHAL_WS
USBHAL_OSentriesOffset * :INDEX:OSentries
HAL_KbdScanSetup
Push "lr"
; 16K of regular heap
ADRL a1, USBAllocArea
MOV a2, #USBAllocAreaSize
; 32K of ncnb/contig heap, minus whatever we've already allocated
LDR a3, NCNBAllocNext
LDR a4, NCNBWorkspace
ADD a4, a4, #32*1024
STR a4, NCNBAllocNext ; Should trigger an abort if we try allocating anything further
SUB a4, a4, a3
[ KbdDebug
DebugTX "HAL_KbdScanSetup"
DebugTime ip, "@ "
DebugReg a1, "Regular heap @ "
DebugReg a2, "Size "
DebugReg a3, "Contig heap @ "
DebugReg a4, "Size "
]
BL USBHAL_Init
; ATM MUSB stuff is OMAP3 only
; BL USBHAL_MUSBDriver_Init
BL USBHAL_EHCIDriver_Init
Pull "pc"
HAL_KbdScan
Push "lr"
[ KbdDebug
DebugTX "HAL_KbdScan"
]
BL USBHAL_KbdScan
[ KbdDebug
DebugReg a1, "= "
]
Pull "pc"
HAL_KbdScanInterrupt
B USBHAL_KbdScanInterrupt
EXPORT HAL_KbdScanDependencies
HAL_KbdScanFinish
[ KbdDebug
Push "lr"
DebugTX "HAL_KbdScanFinish"
DebugTime a1, "@ "
LDR a1, USBHAL_WS+USBHAL_WS_Heap_Normal
LDR a2, [a1, #8]
LDR a3, [a1, #12]
SUB a1, a3, a2
DebugReg a1, "Regular heap free "
LDR a1, USBHAL_WS+USBHAL_WS_Heap_NCNB
LDR a2, [a1, #8]
LDR a3, [a1, #12]
SUB a1, a3, a2
DebugReg a1, "Contig heap free "
Pull "lr"
]
B USBHAL_Shutdown
HAL_KbdScanDependencies
ADR a1, %FT10
MOV pc, lr
10
; Modules needed for keyboard scanning, no need to list those
; before 'FirstUnpluggableModule' since they can't be unplugged
DCB "SharedCLibrary,BufferManager,DeviceFS,USBDriver,"
DCB "EHCIDriver,InternationalKeyboard", 0
END
......@@ -272,6 +272,7 @@ NVMemory_Init
; Check the loaded CMOS is from the 5.xx era
[ :LNOT: ProbeEESize
LDR v2, IntSRAM_Log
ADD v2, v2, #:INDEX:FATLoadedCMOS
]
LDR a1, [v2, #?FATLoadedCMOS - 4]
SUB a1, a1, #500
......
......@@ -26,6 +26,7 @@
GET hdr.omap4_reg
EXPORT PL310_InitDevice
EXPORT dmb_st
IMPORT memcpy
......@@ -131,5 +132,17 @@ PL310Sleep
MOV a1, #0 ; Previously at full power
MOV pc, lr
dmb_st
Push "a1, lr"
; Perform an ARM + PL310 DMB ST
ADRL a1, PL310Device
LDR a1, [a1, #HALDevice_Address]
TEQ a1, #0 ; Just in case we're called before PL310_InitDevice
DMB ST
BEQ %FT10
PL310Sync a1, lr
10
Pull "a1, pc"
END
......@@ -77,9 +77,9 @@ SysClkTable
; Counter Clock speed SYS_CLKSEL Divider DelayMul
DCD 19000, 38400000, 7, 2, 384
DCD 15200, 26000000, 5, 2, 260
DCD 9000, 19200000, 4, 1, 192
DCD 7600, 13000000, 1, 1, 130
DCD -1, 12000000, 0, 1, 120
; Where is 16.8MHz?
DCD 11000, 19200000, 4, 1, 192
DCD 9000, 16800000, 3, 1, 168
DCD 7000, 12000000, 1, 1, 120
DCD -1, 00000000, 0, 1, 0
END
......@@ -35,6 +35,7 @@
; KEEP ; for debugging
GET Hdr:ListOpts
GET Hdr:CPU.Arch
GET Hdr:Macros
GET Hdr:OSEntries
GET hdr.omap4430
......@@ -221,8 +222,8 @@ SDHCI HALDeviceField GetWriteProtect, 0 ; patched up at initialisation
; Init the SDHCI HAL device(s)
; a1 = GPIOType value
; a2 = GPIORevision value
; a1 = BoardType value
; a2 = BoardRevision value
SDIO_InitDevices ROUT
Push "lr"
MOV a3, #0
......@@ -231,8 +232,8 @@ SDIO_InitDevices ROUT
Pull "pc"
; Init one SDHCI HAL device
; a1 = GPIOType value
; a2 = GPIORevision value
; a1 = BoardType value
; a2 = BoardRevision value
; a3 = device number
; a4 -> workspace for this device
InitDevice ROUT
......@@ -256,7 +257,7 @@ InitDevice ROUT
; Activate
ADR lr, Activate_MMC1_Pandaboard
TEQ a2, #GPIORevision_PandaES
TEQ a2, #BoardRevision_PandaES
ADREQ lr, Activate_MMC1_PandaboardES
STR lr, [a4, #HALDevice_Activate]
......@@ -266,7 +267,7 @@ InitDevice ROUT
; SetActivity
ADRL lr, SetActivity_Pandaboard
TEQ a2, #GPIORevision_PandaES
TEQ a2, #BoardRevision_PandaES
ADREQL lr, SetActivity_PandaboardES
STR lr, [a4, #HALDevice_SDHCISetActivity]
......
......@@ -38,6 +38,7 @@
IMPORT HAL_IRQClear
IMPORT HAL_FIQClear
IMPORT HAL_CounterDelay
IMPORT dmb_st
; Flag to enable gobs of debug output
GBLL SDMADebug
......@@ -443,6 +444,7 @@ SDMADeactivate
LDR a3, [a2, #DMA4_CCRi]
TST a3, #(DMA4_CCR_RD_ACTIVE + DMA4_CCR_WR_ACTIVE) ; Check RD_ACTIVE & WR_ACTIVE
BNE %BT10
DMB SY ; If this was a write to RAM, ensure CPU sees the final data
; Now disable interrupts (or should we do this first?)
LDR a2, SDMARegs
MRS v1, CPSR
......@@ -663,18 +665,16 @@ SDMASetCurrentTransfer
; a2: buffer physical address
; a3: buffer length, bytes
; a4: bit 0: 1="stop and raise TC signal when this transfer completes". Ignore?
[ SDMADebug
Entry "sb"
[ SDMADebugNoIRQ
PHPSEI lr,sb
Push "lr"
]
LDR sb, SDMAWorkspace
[ SDMADebug
DebugReg a1, "SDMASetCurrentTransfer: "
DebugReg a2, "->Buffer: "
DebugReg a3, "->Length: "
|
Entry
]
LDR a4, SDMAChanRegs
LDR ip, [a4, #DMA4_CCRi]
......@@ -724,6 +724,7 @@ SDMASetCurrentTransfer
DumpReg a4, a1, DMA4_CCFNi
DumpReg a4, a1, DMA4_COLORi
]
BL dmb_st ; If this is a read from RAM, ensure CPU has finished writing. If this is a write to RAM, ensure we don't have a buffered write which is going to clobber the DMA results.
STR ip, [a4, #DMA4_CCRi]
[ SDMADebug
[ SDMADebugNoIRQ
......@@ -786,6 +787,7 @@ SDMATransferState
ADD a1, a3, a2 ; Update source address
SUB a2, a4, a2 ; Update transfer length
MSR CPSR_c, ip ; Interrupts restored
DMB SY ; If this is a write to RAM, ensure CPU sees the data we're saying is there
[ SDMADebug
DebugReg a1, "<-Addr: "
DebugReg a2, "<-Length: "
......@@ -841,6 +843,7 @@ SDMAStatus
LDR a2, [a2, #DMA4_CCRi]
TST a2, #DMA4_CCR_ENABLE ; Check ENABLE bit
ORREQ a1, a1, #DMAStatusFlag_Overrun ; If we're inactive, we're in the overrun state
DMB SY ; If this is a write to RAM, ensure CPU sees the data we're saying is there
[ SDMADebug
DebugReg a1, "<-Flags: "
[ SDMADebugNoIRQ
......@@ -857,13 +860,13 @@ SDMASetCurrentTransfer2
; a3: dest physical address
; a4: buffer length, bytes
; a5: bit 0: 1="stop and raise TC signal when this transfer completes". Ignore?
[ SDMADebug
Entry "sb"
[ SDMADebugNoIRQ
PHPSEI lr,sb
Push "lr"
]
LDR sb, SDMAWorkspace
[ SDMADebug
DebugReg a1, "SDMASetCurrentTransfer2: "
DebugReg a2, "->Source: "
DebugReg a3, "->Dest: "
......@@ -880,16 +883,15 @@ SDMASetCurrentTransfer2
STR a2, [ip, #DMA4_CFNi] ; Only 1 frame to transfer
; Now just enable it?
ORR a1, a1, #DMA4_CCR_ENABLE
BL dmb_st ; If this is a read from RAM, ensure CPU has finished writing. If this is a write to RAM, ensure we don't have a buffered write which is going to clobber the DMA results.
STR a1, [ip, #DMA4_CCRi]
[ SDMADebug
[ SDMADebugNoIRQ
Pull "lr"
PLP lr
]
EXIT
|
MOV pc, lr
]
EXIT
SDMASetNextTransfer2
; N/A
......@@ -922,6 +924,7 @@ SDMATransferState2
ADD a2, a2, a3 ; Update dest address
SUB a3, a4, a3 ; Update transfer length
MSR CPSR_c, ip ; Interrupts restored
DMB SY ; If this is a write to RAM, ensure CPU sees the data we're saying is there
[ SDMADebug
DebugReg a1, "<-Source: "
DebugReg a2, "<-Dest: "
......
......@@ -266,10 +266,15 @@ SR44x_Init ROUT
ADRL v3, CPUClkWS
MOV a1, v3
ADRL a2, SR44xDevTemplate
MOV a3, #HALDevice_CPUClk_Size_0_1
MOV a3, #HALDevice_CPUClk_Size_0_2
BL memcpy
STR sb, [v3, #:INDEX: SR44xWorkspace]
STR v1, [v3, #:INDEX: SR44xOPPTblSize]
; Check for PandaES (OMAP4460) - change entry for GetDieTempES
LDR a1, [sp, #4] ; get marker for ES
CMP a1, #1
ADREQL a1, SR44x_GetDieTempES
STREQ a1, [v3, #HALDevice_CPUClkGetDieTemperature]
; determine actual used settings
LDR ip, L4_ClockMan_Log
......@@ -789,7 +794,7 @@ SR44xDevTemplate
DCW HALDeviceType_SysPeri + HALDeviceSysPeri_CPUClk
DCW HALDeviceID_CPUClk_OMAP4
DCD HALDeviceBus_Peri + HALDevicePeriBus_Sonics3220
DCD 1 ; API version (v0.1)
DCD 2 ; API version (v0.2)
DCD SR44x_Desc ; Description
DCD 0 ; Address - unused
% 12 ; Unused
......@@ -808,7 +813,8 @@ SR44xDevTemplate
DCD SR44x_Set
DCD SR44x_Override
DCD SR44x_GetOverride
ASSERT (.-SR44xDevTemplate) = HALDevice_CPUClk_Size_0_1
DCD SR44x_GetDieTemp
ASSERT (.-SR44xDevTemplate) = HALDevice_CPUClk_Size_0_2
SR44x_Desc
= "OMAP44x SmartReflex CPU clock controller",0
......@@ -1250,4 +1256,114 @@ CPUClk_AdjustDPLL ROUT
]
; Temperature calculation constants (in units of 2^-18)
TEMP_SCALE * 18
TEMP_KELVIN_OFFS * 2732 ; in 0.1 K
; PandaBoard-ES (OMAP4460)
TEMP_CONST_A0_ES * -740388130
TEMP_CONST_A1_ES * 1242412
TEMP_CONST_A2_ES * -98
; PandaBoard (OMAP4430)
TEMP_CONST_A0 * -158373902
TEMP_CONST_A1 * 4609309
TEMP_CONST_A2 * -489
; bits in CONTROL_TEMP_SENSOR
OMAP4430_EOCZ * (1 << 8) ; End Of Conversion
OMAP4430_SOC * (1 << 9) ; Start Of Conversion
OMAP4430_TEMPMASK * 0xFF
OMAP4430_CONTCONV * (1 << 10) ; CONTinuous CONVersion
OMAP4460_EOCZ * (1 << 10) ; End Of Conversion
OMAP4460_SOC * (1 << 11) ; Start Of Conversion
OMAP4460_TEMPMASK * 0x3FF
SR44x_GetDieTempES
; Out: a1 = CPU die temperature in units of 0.1 K
Entry "sb"
LDR sb, SR44xWorkspace
LDR a4, L4_Core_Log
ADD a4, a4, #(L4_SYSCTRL_GENERAL_CORE - L4_Core)
LDR a2, [a4, #CONTROL_TEMP_SENSOR]
; Check for running conversion
TST a2, #OMAP4460_EOCZ
BNE %FT20
; Start a new conversion
ORR a2, a2, #OMAP4460_SOC
STR a2, [a4, #CONTROL_TEMP_SENSOR]
; Wait until conversion starts
10
LDR a2, [a4, #CONTROL_TEMP_SENSOR]
TST a2, #OMAP4460_EOCZ
BEQ %BT10
; Reset SOC bit
BIC a2, a2, #OMAP4460_SOC
STR a2, [a4, #CONTROL_TEMP_SENSOR]
; Wait until conversion is finished
20
LDR a2, [a4, #CONTROL_TEMP_SENSOR]
TST a2, #OMAP4460_EOCZ
BNE %BT20
UBFX a2, a2, #0, #10 ; extract temperature ADC value
; now convert the ADC value to a temperature
; instead of using a large table (OMAP4460 TRM Rev. AA, page 3733 - 3736)
; we are calculating a polynom of second order derived from above table
; y := temp; x := ADC value
; y = ((A2 * x + A1) * x + A0) >> TEMP_SCALE
LDR a3, =TEMP_CONST_A2_ES
LDR a4, =TEMP_CONST_A1_ES
MLA a1, a3, a2, a4
LDR a4, =TEMP_CONST_A0_ES
MLA a3, a1, a2, a4
LDR a4, =TEMP_KELVIN_OFFS
ADD a1, a4, a3, ASR #TEMP_SCALE
EXIT
SR44x_GetDieTemp
; Out: a1 = CPU die temperature in units of 0.1 K
; Remark: temperature conversion on OMAP4430 takes 51 - 54 clock cycles (CLK32K)
; [i.e. ~1.5564 ms - 1.6479 ms at 32768 Hz]
; A running conversion (EOCZ == 1) takes 40 cycles [i.e. ~1.221 ms].
; For avoiding too much waiting we use the continuous conversion mode.
Entry "sb"
LDR sb, SR44xWorkspace
LDR a4, L4_Core_Log
ADD a4, a4, #(L4_SYSCTRL_GENERAL_CORE - L4_Core)
LDR a2, [a4, #CONTROL_TEMP_SENSOR]
; Check for continuous conversion already started
TST a2, #OMAP4430_CONTCONV
BNE %FT20 ; wait for valid temperature value
; This must be done only once for continuous conversion mode
ORR a2, a2, #(OMAP4430_SOC + OMAP4430_CONTCONV)
STR a2, [a4, #CONTROL_TEMP_SENSOR]
; Wait until conversion starts
10
LDR a2, [a4, #CONTROL_TEMP_SENSOR]
TST a2, #OMAP4430_EOCZ
BEQ %BT10
; Reset SOC bit
BIC a2, a2, #OMAP4430_SOC
STR a2, [a4, #CONTROL_TEMP_SENSOR]
; Wait until conversion is finished
20
LDR a2, [a4, #CONTROL_TEMP_SENSOR]
TST a2, #OMAP4430_EOCZ
BNE %BT20
UBFX a2, a2, #0, #8 ; extract temperature ADC value
; now convert the ADC value to a temperature
; instead of using a table (OMAP4430 TRM Rev AO, page 3674 - 3675)
; we are calculating a polynom of second order derived from above table
; y := temp; x := ADC value
; y = ((A2 * x + A1) * x + A0) >> TEMP_SCALE
LDR a3, =TEMP_CONST_A2
LDR a4, =TEMP_CONST_A1
MLA a1, a3, a2, a4
LDR a4, =TEMP_CONST_A0
MLA a3, a1, a2, a4
LDR a4, =TEMP_KELVIN_OFFS
ADD a1, a4, a3, ASR #TEMP_SCALE
EXIT
END