Adopt revised HAL_PhysInfo API

Also spotted that USAT can be conditional in the I2C code.

Version 0.12. Tagged as 'OMAP4-0_12'

VersionNum

-/* (0.11)
+/* (0.12)
  *
  * This file is automatically maintained by srccommit, do not edit manually.
  * Last processed by srccommit version: 1.1.
  *
  */
-#define Module_MajorVersion_CMHG        0.11
+#define Module_MajorVersion_CMHG        0.12
 #define Module_MinorVersion_CMHG        
-#define Module_Date_CMHG                04 Jul 2012
+#define Module_Date_CMHG                09 Jul 2012
 
-#define Module_MajorVersion             "0.11"
-#define Module_Version                  11
+#define Module_MajorVersion             "0.12"
+#define Module_Version                  12
 #define Module_MinorVersion             ""
-#define Module_Date                     "04 Jul 2012"
+#define Module_Date                     "09 Jul 2012"
 
-#define Module_ApplicationDate          "04-Jul-12"
+#define Module_ApplicationDate          "09-Jul-12"
 
 #define Module_ComponentName            "OMAP4"
 #define Module_ComponentPath            "castle/RiscOS/Sources/HAL/OMAP4"
 
-#define Module_FullVersion              "0.11"
-#define Module_HelpVersion              "0.11 (04 Jul 2012)"
-#define Module_LibraryVersionInfo       "0:11"
+#define Module_FullVersion              "0.12"
+#define Module_HelpVersion              "0.12 (09 Jul 2012)"
+#define Module_LibraryVersionInfo       "0:12"

s/Boot

@@ -842,12 +842,30 @@ NotAvailable    *       &88888888
         IMPORT  memset
 
 HAL_PhysInfo
-        TEQ     a1, #0
+        TEQ     a1, #PhysInfo_GetTableSize
         MOVEQ   a1, #1:SHL:(32-ByteShift)
+        STREQ   a1, [a2]
+        MVNEQ   a1, #0             ; Supported
         MOVEQ   pc, lr
 
-        Push    "a2,v1,v2,lr"
-        MOV     v1, a1
+        TEQ     a1, #PhysInfo_HardROM
+        MOVEQ   a1, #0             ; No hard ROM, since the NAND flash isn't yet supported
+        MOVEQ   a2, #0
+        STMEQIA a3, {a1-a2}
+        MVNEQ   a1, #0             ; Supported
+        MOVEQ   pc, lr
+
+        TEQ     a1, #PhysInfo_WriteTable
+        MOVNE   a1, #0
+        MOVNE   pc, lr
+
+        ; Do the PhysInfo_WriteTable table output
+        Push    "v1-v2,lr"
+        MOV     a1, #&80000000     ; Physical RAM from &80000000 and up?
+        LDR     lr, =&FFFFE000-1
+        STMIA   a3, {a1,lr}
+        MOV     v1, a2
+
         ADR     v2, HAL_PhysTable
 10      LDMIA   v2, {a1, a2, lr}
         SUB     a3, lr, a1
@@ -857,10 +875,8 @@ HAL_PhysInfo
         LDR     a1, [v2, #8]!
         TEQ     a1, #0
         BNE     %BT10
-        MOV     a1, #&80000000 ; Physical RAM from &80000000 and up?
-        LDR     lr, =&FFFFE000-1
-        Pull    "a2"
-        STR     lr, [a2]
+
+        MVN     a1, #0             ; Supported
         Pull    "v1,v2,pc"
 
 ; HAL_PhysInfo uses memset to fill the table, so all regions

s/I2C

@@ -823,7 +823,7 @@ HAL_VideoIICOp
         LDRNE     a1, [a1]
         LDRNE     lr, =ErrorNumber_IIC_NoAcknowledge
         SUBNE     a1, a1, lr             ;   0/1/2 = NoAck/Error/Busy
-        USAT      a1, #2, a1             ; 4+ => 3 = Error
+        USATNE    a1, #2, a1             ; 4+ => 3 = Error
         ADRNE     lr, %FT05
         LDRNEB    a1, [lr, a1]
         B         %FT20