Commit 0764678a authored by Jeffrey Lee's avatar Jeffrey Lee
Browse files

Merge in latest changes from HEAD

Version 0.59, 1.52.2.3. Tagged as 'OMAP4-0_59-1_52_2_3'
parent a7503322
/* (0.54)
/* (0.59)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.54
#define Module_MinorVersion_CMHG 1.52.2.2
#define Module_Date_CMHG 10 Sep 2017
#define Module_MajorVersion_CMHG 0.59
#define Module_MinorVersion_CMHG 1.52.2.3
#define Module_Date_CMHG 07 Jul 2018
#define Module_MajorVersion "0.54"
#define Module_Version 54
#define Module_MinorVersion "1.52.2.2"
#define Module_Date "10 Sep 2017"
#define Module_MajorVersion "0.59"
#define Module_Version 59
#define Module_MinorVersion "1.52.2.3"
#define Module_Date "07 Jul 2018"
#define Module_ApplicationDate "10-Sep-17"
#define Module_ApplicationDate "07-Jul-18"
#define Module_ComponentName "OMAP4"
#define Module_ComponentPath "castle/RiscOS/Sources/HAL/OMAP4"
#define Module_FullVersion "0.54 (1.52.2.2)"
#define Module_HelpVersion "0.54 (10 Sep 2017) 1.52.2.2"
#define Module_LibraryVersionInfo "0:54"
#define Module_FullVersion "0.59 (1.52.2.3)"
#define Module_HelpVersion "0.59 (07 Jul 2018) 1.52.2.3"
#define Module_LibraryVersionInfo "0:59"
......@@ -59,7 +59,8 @@ GPIO_CLEARDATAOUT * &190
GPIO_SETDATAOUT * &194
GPIO_PIN_MAX * 192
GPIO_PORT_MAX * 6
GPIO_PIN_MAX * (32 * GPIO_PORT_MAX)
; Flags for GPIOx_SetAndEnableIRQ
GPIO_LEVELDETECT0_FLAG * 1
......
This diff is collapsed.
......@@ -111,7 +111,7 @@ VideoBoardConfig # VideoBoardConfig_Size
AudioWS # Audio_WorkspaceSize
CPUClkWS # SR44x_WorkspaceSize
GPIOWS # HALDevice_GPIO_Size
GPIOWS # 6 * (HALDevice_GPIO_Size_1_0 + (2*4))
NVRAMWS # HALDeviceSize
RTCWS # RTCSize
......@@ -119,16 +119,6 @@ SDIOWS # SDHCISize * MaxSDControllers
PL310Device # HALDeviceSize
DBellDevice # HALDevice_DBell_Size
; align on 16 byte boundary
# (((:INDEX:@)+15):AND::NOT:15)-(:INDEX:@)
USBAllocAreaSize * 16*1024
; With an ordinary setup, about half of this memory gets used.
; About 3K goes to some big allocs (looks like the bus structs)
USBAllocArea # USBAllocAreaSize
HAL_WsSize * :INDEX:@
......
......@@ -59,6 +59,13 @@ MachID_OMAP35xEVM * 1535
MachID_OMAP4430SDP * 2160
MachID_PandaBoard * 2791
; Enumerations of the board type, and any minor revisions within that type
^ 0
BoardType_OMAP4_Panda # 1 ; It's a PandaBoard or PandaBoard-ES
^ 0
BoardRevision_Panda # 1 ; PandaBoard
BoardRevision_PandaES # 1 ; PandaBoard-ES
; todo - SDRC register settings? function pointers for more flexible setup?
; (board revision detection, USB PHY, DVI framer, HAL devices, etc.)
......
......@@ -158,7 +158,7 @@ HALdescriptor DATA
IMPORT GPMC_Init
IMPORT GPIO_Init
IMPORT GPIOx_SetAsOutput
IMPORT GPIO_InitDevice
IMPORT GPIO_InitDevices
IMPORT SDIO_InitDevices
IMPORT NVMemory_Init
IMPORT NVMemory_InitDevice
......@@ -723,11 +723,11 @@ Board_InitDevices_Panda
LDR v2, =HAWKEYE_OMAP4460_ES10
UBFX a2, a2, #12, #16
CMP v2, a2
MOV a1, #GPIOType_OMAP4_Panda
MOVNE a2, #GPIORevision_Panda
MOVEQ a2, #GPIORevision_PandaES
MOV a1, #BoardType_OMAP4_Panda
MOVNE a2, #BoardRevision_Panda
MOVEQ a2, #BoardRevision_PandaES
Push "a1-a2"
BL GPIO_InitDevice
BL GPIO_InitDevices
; SD needs the same parameters to configure the device correctly
Pull "a1-a2"
BL SDIO_InitDevices
......
This diff is collapsed.
......@@ -222,8 +222,8 @@ SDHCI HALDeviceField GetWriteProtect, 0 ; patched up at initialisation
; Init the SDHCI HAL device(s)
; a1 = GPIOType value
; a2 = GPIORevision value
; a1 = BoardType value
; a2 = BoardRevision value
SDIO_InitDevices ROUT
Push "lr"
MOV a3, #0
......@@ -232,8 +232,8 @@ SDIO_InitDevices ROUT
Pull "pc"
; Init one SDHCI HAL device
; a1 = GPIOType value
; a2 = GPIORevision value
; a1 = BoardType value
; a2 = BoardRevision value
; a3 = device number
; a4 -> workspace for this device
InitDevice ROUT
......@@ -257,7 +257,7 @@ InitDevice ROUT
; Activate
ADR lr, Activate_MMC1_Pandaboard
TEQ a2, #GPIORevision_PandaES
TEQ a2, #BoardRevision_PandaES
ADREQ lr, Activate_MMC1_PandaboardES
STR lr, [a4, #HALDevice_Activate]
......@@ -267,7 +267,7 @@ InitDevice ROUT
; SetActivity
ADRL lr, SetActivity_Pandaboard
TEQ a2, #GPIORevision_PandaES
TEQ a2, #BoardRevision_PandaES
ADREQL lr, SetActivity_PandaboardES
STR lr, [a4, #HALDevice_SDHCISetActivity]
......
......@@ -1273,6 +1273,7 @@ TEMP_CONST_A2 * -489
OMAP4430_EOCZ * (1 << 8) ; End Of Conversion
OMAP4430_SOC * (1 << 9) ; Start Of Conversion
OMAP4430_TEMPMASK * 0xFF
OMAP4430_CONTCONV * (1 << 10) ; CONTinuous CONVersion
OMAP4460_EOCZ * (1 << 10) ; End Of Conversion
OMAP4460_SOC * (1 << 11) ; Start Of Conversion
OMAP4460_TEMPMASK * 0x3FF
......@@ -1285,6 +1286,10 @@ SR44x_GetDieTempES
LDR a4, L4_Core_Log
ADD a4, a4, #(L4_SYSCTRL_GENERAL_CORE - L4_Core)
LDR a2, [a4, #CONTROL_TEMP_SENSOR]
; Check for running conversion
TST a2, #OMAP4460_EOCZ
BNE %FT20
; Start a new conversion
ORR a2, a2, #OMAP4460_SOC
STR a2, [a4, #CONTROL_TEMP_SENSOR]
; Wait until conversion starts
......@@ -1317,12 +1322,21 @@ SR44x_GetDieTempES
SR44x_GetDieTemp
; Out: a1 = CPU die temperature in units of 0.1 K
; Remark: temperature conversion on OMAP4430 takes 51 - 54 clock cycles (CLK32K)
; [i.e. ~1.5564 ms - 1.6479 ms at 32768 Hz]
; A running conversion (EOCZ == 1) takes 40 cycles [i.e. ~1.221 ms].
; For avoiding too much waiting we use the continuous conversion mode.
Entry "sb"
LDR sb, SR44xWorkspace
LDR a4, L4_Core_Log
ADD a4, a4, #(L4_SYSCTRL_GENERAL_CORE - L4_Core)
LDR a2, [a4, #CONTROL_TEMP_SENSOR]
ORR a2, a2, #OMAP4430_SOC
; Check for continuous conversion already started
TST a2, #OMAP4430_CONTCONV
BNE %FT20 ; wait for valid temperature value
; This must be done only once for continuous conversion mode
ORR a2, a2, #(OMAP4430_SOC + OMAP4430_CONTCONV)
STR a2, [a4, #CONTROL_TEMP_SENSOR]
; Wait until conversion starts
10
......
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