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The Raspberry Pi 4 is more radically different from its predecessors than any previous new generation of the Raspberry Pi. As such, it has unfortunately not been possible to get the RISC OS port fully functional before launch.

Note! The 4x main USB sockets and Ethernet are completely non-functional at present, and so this is not yet considered suitable for general users.

If you are able to assist in the USB/Ethernet development you will need to build the ROM from source, pulling this development branch into your source tree, and to choose whether to connect via USB or serial during the process.

You will need:

• the firmware files bootcode.bin, fixup4.dat, start4.elf plus the usual config.txt
• add the following line at the end of config.txt:

[pi4]
enable_gic=1

• since DHCP hangs indefinitely waiting for the Ethernet controller, remove SetupNet from PreDesk

To work using USB peripherals plugged into the USB-C socket:

• an USB-C male to USB-A female adapter lead and another means of powering the Pi (eg. via the GPIO pins), or
• a powered USB-C hub that is able to deliver approximately 800mA through the USB-C connector

To work using a serial terminal:

• a serial lead and terminal application on another machine to drive the UART on header pins 6, 8 and 10 at 115200 baud, 8N1
• in Kernel/hdr/Options, set DebugTerminal to {TRUE}
• in HAL_BCM2835/hdr/BCM2835, set Debug and HALDebug to {TRUE}
• since the desktop can't be driven over serial, a quick way to ensure we don't leave the command line is to knock the Desktop module out from the Components file
• to stop the serial driver from controlling the debug UART, knock the DualSerial module out from the Components file too (in this case, you may wish to suffix it with "-type EXP" rather than commentig it out, to ensure its export phase still runs if you are building from clean)

added 5 commits

• 9162bffe - Minimal read-write support for mini-UART
• 171ba9a5 - Get IRQs working
• d51d9848 - Enable SD controller
• 6f7a3642 - GPIO support
• 58fa999e - SD bugfixes

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It has been brought to my attention that the non-prerelease versions of the firmware have separate versions of start.elf (and fixup.dat) for the Pi 4, named start4.elf (and fixup4.dat), and it's start4.elf that you want to be editing.

I'm pleased to say that the issues identified so far with the production firmware are now resolved - assuming you pull RiscOS/Sources/Video/HWSupport/BCMVideo!3 (merged) into your source tree if it hasn't already been merged - and the build is now just as functional (or non-functional) with it as it was with the pre-production firmware.

Changes:

• bcm2711-rpi-4-b.dtb is no longer required to be present on the card.
• You should now be using bootcode.bin, fixup4.dat and start4.elf from the official firmware project. No editing of the files is required any more. Add fixup.dat and start.elf if you want to boot a Pi 0, 1, 2 or 3 from the same card.
• Until we get GIC support working, you must also install the attached pi4.bin file. Sources are available here if you want to build it yourself.
• You need to add the following lines at the end of config.txt:

[pi4]
armstub=pi4.bin

added 5 commits

• 182db154 - Minimal read-write support for mini-UART
• 761ea73f - Get IRQs working
• bda689c9 - Enable SD controller
• 8d42ee4d - GPIO support
• 677638ac - SD bugfixes

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added 1 commit

• b0fff04e - Extended IRQ support, and FIQ support

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Minor updates there: if you hadn't happened to pick up on the change I made on my (non-functional) EMMC2 branch, this reads the core clock via the mailbox (which is necessary because it changed between firmware versions - without this change, your UART clock will be divided incorrectly). Fixed FIQ support would theoretically enable the DWC USB controller to talk via the USB-C connector if you can power the board via the GPIO header, but having tried it briefly, it hasn't worked for me. Extended IRQs aren't much use on their own until we have device drivers that use them (Ethernet and PCIe).

added 2 commits

• f3409346 - Extended IRQ support, and FIQ support
• 21311b9c - Support EMMC2 controller

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added 1 commit

• a81efe9a - Support >1GB RAM

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added 11 commits

• a81efe9a...699a746a - 2 commits from branch RiscOS/Sources/HAL:master
• 184ef58f - Peripheral physical addresses have moved again
• 84c59757 - Minimal read-write support for mini-UART
• 6f37ca3f - Get IRQs working
• 19305903 - Enable SD controller
• a67b229e - GPIO support
• 4b8b13fc - SD bugfixes
• db013ed7 - Extended IRQ support, and FIQ support
• 516137ab - Support EMMC2 controller
• 4d0751fd - Support >1GB RAM

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• 27bd51c6 - Fix debugging via UART0

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Now that UART0 is fixed, there's no need to use the MiniUART for debugging. This also means you don't need to disable the Portable module (but you do need to disable DualSerial, to stop it trying to hijack the UART)

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we seem to be getting CMOS resets on every boot at present

The CMOS seems to be being retained just fine for me (3 out of 3 resets). I have the magic line in config.txt (copied from RISC OS Pi) to load it, and the CMOS file itself is in !Boot.Loader (also copied from RISC OS Pi). ROM built 08-Sep-2019.

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resolved all threads

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• 9433eb1f - Add GIC interrupt controller support for BCM2838.

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• a3340dd3 - Add preliminary PCIe setup steps

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In light of a3340dd3 we can now see the VIA chipset, which is nice

After a few hours of opening and closing windows yesterday I still didn't manage to see out to the main register set of the VL805. The BAR is set up so PCI Manager reports it (though in truth all that confirms is PCI Manager can read back a 32 bit value - not that exciting) as a memory window, but that's about it. The bridge is set to forward memory transactions, though I'm not totally sure it's decoding the address properly as all addresses read as 0xDEADDEAD.

Does anyone have Linux running on their Pi4? To save me some bother, a dump of their bridge setup might be useful. I believe the command is lspci -vx or possibly lspci -xxx which should give a hex dump.

For the record (thanks to David Pitt) here's the answer:

pi@raspberrypi32:~ $ lspci -vx
00:00.0 PCI bridge: Broadcom Limited Device 2711 (rev 10) (prog-if 00 [Normal decode])
	Flags: bus master, fast devsel, latency 0, IRQ 55
	Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
	I/O behind bridge: 00000000-00000fff
	Memory behind bridge: f8000000-f80fffff
	Capabilities: <access denied>
	Kernel driver in use: pcieport
00: e4 14 11 27 46 01 10 00 10 00 04 06 10 00 01 00
10: 00 00 00 00 00 00 00 00 00 01 01 00 00 00 00 00
20: 00 f8 00 f8 f1 ff 01 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 48 00 00 00 00 00 00 00 37 01 01 00

01:00.0 USB controller: VIA Technologies, Inc. VL805 USB 3.0 Host Controller (rev 01) (prog-if 30 [XHCI])
	Subsystem: VIA Technologies, Inc. VL805 USB 3.0 Host Controller
	Flags: bus master, fast devsel, latency 0, IRQ 56
	Memory at 600000000 (64-bit, non-prefetchable) [size=4K]
	Capabilities: <access denied>
	Kernel driver in use: xhci_hcd
00: 06 11 83 34 46 05 10 00 01 30 03 0c 10 00 00 00
10: 04 00 00 f8 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 83 34
30: 00 00 00 00 80 00 00 00 00 00 00 00 37 01 00 00

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• 4b927f7d - Add EtherNIC HAL device

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• 95784ee9 - Add remaining PCIe setup steps

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• 6a4560d8 - Extend the PCI address table for 64b

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• 0d1b2fb6 - Fix OS_SerialOp default handshaking use on Pi

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• cbd2b29e - Let VCHIQ know which page list format to use

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With the latest HAL changes and RiscOS/Sources/HWSupport/VCHIQ!1 (merged), silent audio output and invisible mouse pointers should be fixed

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• 5848f063 - Make a substitute for MPHI

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• 6116b8f7 - Spelling

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Pi 4 just got 70% less annoying to debug over a serial terminal...

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• 59c1b6f1 - More sensible abstraction

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This branch is in need of rebasing - does anyone need me to hold off for a while? I'll probably squash 6116b8f7 into another commit at the same time.

anyone need me to hold off for a while?

Not me. Though I manually applied 0d1b2fb6 from the trunk, which I guess is all it's complaining about, so any rebase should reduce to a nop.

No objections here.

added 19 commits

• 0b2f7c19 - 1 commit from branch RiscOS/Sources/HAL:master
• 67d46df6 - Peripheral physical addresses have moved again
• eed3f44e - Minimal read-write support for mini-UART
• 72381d68 - Get IRQs working
• 0d6ff642 - Enable SD controller
• 987b080d - GPIO support
• 40b661d1 - SD bugfixes
• 21977fe8 - Extended IRQ support, and FIQ support
• 8c95c72e - Support EMMC2 controller
• 8d1e74f8 - Support >1GB RAM
• a634aca4 - Fix debugging via UART0
• c821ef59 - Add GIC interrupt controller support for BCM2838.
• 58c2c84e - Add preliminary PCIe setup steps
• b4504f00 - Add EtherNIC HAL device
• 0eae18b2 - Add remaining PCIe setup steps
• 5984aed1 - Extend the PCI address table for 64b
• 34e39bc3 - Let VCHIQ know which page list format to use
• b1d217a2 - Make a substitute for MPHI
• 76cb713f - More sensible abstraction

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• b2a309bc - Update table for 4B revision 1.2

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• 9fadd58c - Update table for another 4B revision 1.2

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Might I suggest that the WIP status is removed now?

It's at a point where "only" dangling issues: XHCI over PCIe & on board Ethernet, remain, neither of which implicates the HAL (well, bugs aside). Since we've been careful to use CPUDetect where differences arise, it should all be happy with older Pi models anyway.

The Pi 4 wiki page that Stuart has created can have the notes about config.txt and stuff grafted on in anticipation of a pukka release candidate.

Has anyone tested a build from this branch on a older Pi? No objection if we're reasonably sure we're not going to break the nightly builds by doing so.

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unmarked as a Work In Progress

merged