GitLab

Detail:
* Implement SD activity LED for Pi 4
* Remove inappropriate reprogramming of GPIO47 for Pi 3 B(+) and A+
* Correct the value for SDHCIWriteInterval which is used during SetSDCLK()

Detail:
* Board recognition for Pi 4
* Updated the pin enumeration table to specify new functions available in Pi 4
  (I2C[3456], SPI[3456], UART[2345])

Detail:
* Efforts to get the faster EMMC2 controller working are ongoing. In the
  meantime, this enables the backward-compatible EMMC1 controller.
* The method required to control the activity LED appears to have changed,
  yet again. I haven't worked out how yet, so this is currently
  non-functional.

Detail:
* For now, this uses the legacy interrupt controller, whose register layout has
  unfortunately changed in some unhelpful ways. There is also a GICv2 in the
  SoC, which we will need to transition across to in order to use some of the
  newer peripherals (including USB3 and gigabit Ethernet).
* This requires a corresponding set of changes to start.elf: substitute all
  three instances of &E30011E7 with &E3001000.
* FIQs are not currently supported, as the legacy interrupt controller has
  changed how these are handled. It seems likely that we'll transition to
  GIC before too long, which means it's not worth bothering to implement them
  for the legacy interrupt controller.

Because the mini-UART clock is derived from the core clock, and this varies
by hardware platform and even firmware version, move the initial mailbox
read to before UART initialisation so that this information is available.

Also:
* the IO region previously used only for the QA7 extensions now holds a GIC
  as well on Pi 4, so give it a more generic name
* there's a new, second peripheral IO region to map in as well

The default state for the Serial device (aka OS_SerialOp, and redirection to serial via *FX) is to expect hardware handshaking. However the implementation of HAL_UARTModemStatus when ModemControl = {FALSE} state didn't set a return value so ended up returning a1 = the port number (=0) rather than valid status bits. In turn, DualSerial took that to mean CTS/DSR deasserted and refused to send anything.
To a lesser extent HAL_UARTModemControl also affected, returning a1 = port number 0 too.
For both, set a return value; the value is as though a cable is always present with RTS=CTS and DTR=DSR.

Also, fix the bugs in ModemControl = {TRUE}. This also fakes DTR=DSR which status/control bits don't appear to be implemented in the UART peripheral. Tested briefly, checking CTS state when plugging/unplugging a cable.

Version 0.82. Tagged as 'HAL_BCM2835-0_82'

RISCOS_MapInIO does relatively little processing on the L1PT flags that the
HAL passes to it. However, when modules come along later and try to locate
IO again, using OS_Memory 13, access permissions are specified using a
variation on dynamic area flags. The kernel translates from these to L1PT
flags, and one of the rules it applies is that the shareability bit is set
if on a multiprocessor system. On Pi 2 and later, this means it doesn't find
a match amongst the sections that were mapped in by the HAL, and in practice
this means BCMVideo ends up causing 16MB of IO space to be mapped in twice.

Fix this by passing the L1_S flag to RISCOS_MapInIO on Pi 2 and later. This
effectively frees up an additional 16MB of logical address space for dynamic
areas.

Version 0.81. Tagged as 'HAL_BCM2835-0_81'

On entry to HAL_SendHostMessage, we ensure the contents of the mailbox buffer
are flushed out to the ARM L2 cache (if applicable) and main memory. There
were a couple of instructions to fill in the top two bits of the address
before passing it to the VC, but they were commented out for reasons that are
not clear.

The effect of this is that the VC will look in its L1 and L2 caches for the
data in the buffer. On Pi 1 and 0, this wouldn't be too bad, since ARM11
didn't have its own L2 cache and would have written the data into the VC L2
cache instead, meaning that there would only be coherencency problems if the
VC L1 cache still contained the old contents of the address. On Pi 2-4, it's
more risky, because the VC L2 cache could also be inconsistent with main
memory at this point.

Reinstating the top two bits doesn't appear to cause any ill effects I can
see (tested on Pi 1 and 4), so put these instructions back in.

Version 0.80. Tagged as 'HAL_BCM2835-0_80'

GPIO.s,hdr/BCM2835: Table of known ids updated
SPI.s: Fix long broken compute module support (only the original CM1 would have exported SPI2 due to not checking for the new id scheme).
Unrelated, SDIO.s: Use CallOS macro.

Thanks to Chris Hall for testing this on a CM3+ 8GB model.

Version 0.79. Tagged as 'HAL_BCM2835-0_79'

Do an upfront check for the model being 0, if that ever changes there's probably something seriously different. Look only at the Board_Revision elsewhere.
Add the other Compute module to the SPI2 check (though currently the checks don't consider "New" revision words).

Version 0.78. Tagged as 'BCM2835-0_78'

SDIO.s: a condition code mixup meant that during intense SD card activity the thunder bolt symbol would appear due to poking the non-LED lines on 3B+
GPIO.s: extend the 'free for use' table to include 3A+ pins, otherwise it read off the end; add an ASSERT to catch this in future

Version 0.77. Tagged as 'BCM2835-0_77'

Not tagged

Detail:
  hdr/StaticWS - Reserve workspace for QA7 peripheral address, HAL-wide spinlock, and doorbell device
  Makefile, s/DBell - Add doorbell device implementation
  hdr/BCM2835 - Clean up dead macros, add new macros for spinlock claim/release and basic CPU detection. Define new IRQ numbers for the "QA7" peripheral.
  hdr/CastleMacros, s/Top - Generate two HAL descriptors and entry point tables: One for single-core machines and one for multi-core machines. This avoids some MP-related overheads on ARM11 models of Pi. Implement SMP HAL entry points.
  s/Interrupts - Add support for the QA7 interrupts. Although some interrupts can be flexibly routed to different cores, we currently stick with a static scheme.
  s/Messaging - Use CPUDetect macro
Admin:
  Untested
  Requires Kernel-6_09


Version 0.76. Tagged as 'BCM2835-0_76'

Top.s: HAL_UARTStartUp takes 0's based UART numbers, so the debug setup would go wrong (if HAL_UARTStartUp actually checked the value).
UART.s: Re-express the baud register default value so its origin is clear.
Retagged as BCM2835-0_75 as the (non-debug) version is binary identical.

Add Pi3 B+ and Zero W.
Split out CM3 from CM1, since the CM3 reuses some high GPIO lines as bit bashed SMPSU IIC bus, so we can't offer those for GPIO like on CM1.

Version 0.75. Tagged as 'BCM2835-0_75'

Detail:
  hdr/BCM2835 - Add some new board revision values
  s/SDIO - Treat the 3B+ the same as the 3B when handling the activity LED. Also detect the Embest-manufactured CM1 and treat it the same as the Sony one.
Admin:
  Tested on Raspberry Pi 3B+


Version 0.74. Tagged as 'BCM2835-0_74'

Detail:
  s/KbdScan - Add RTSupport to the list of modules (dependency of DWCDriver)
Admin:
  Tested on Raspberry Pi 3


Version 0.73. Tagged as 'BCM2835-0_73'

Detail:
  Add keyboard scan code with list of modules that the kernel needs to do the same.
  Reorder the HALEntries to match Kernel-5_89.
  Remove unused stub functions (now KbdScan exists).
Admin:
  Submission for USB bounty.

Version 0.72. Tagged as 'BCM2835-0_72'

Detail:
  Firmware as of 28th July will allow the GPU to make use of the top 16MB of RAM in 1GB machines. This overlaps the ARM's IO space, essentially making that area of memory inaccessible to us.
  This causes problems because we rely on a couple of buffers which are located in VC memory (virtual GPIO buffer & FT5406 touchscreen buffer)
  At some point extra mailbox messages were added to allow the ARM to dictate the location of these buffers; so make use of those messages wherever possible.
  File changes:
  s/Messaging - Remove VirtGPIOBuf and TouchBuf related tags from the initialisation tag sequence. Add new GetVCBuffer function that can be called post-MMU init to deal with getting/setting the buffer addresses.
  s/Top - Use GetVCBuffer to initialise VirtGPIOBuf
  s/Touch - Use GetVCBuffer to get touchscreen buffer
  hdr/StaticWS - Remove TouchBuf from workspace, no longer needed
Admin:
  Tested on Raspberry Pi 3 with firmware from March 2016 (Set commands not supported), 21st July 2017 (set commands supported, but upper 16MB not used), 28th July 2017 (set commands supported and necessary)


Version 0.71. Tagged as 'BCM2835-0_71'

GPOI -> GPIO
set -> cleared
No code change, not tagged.

Apparently there are some A+ 1.1 and B+ 1.2's in the wild not built with their former id's (0x12 and 0x13) but using the newer 24 bit id scheme. Add aliases for these.

Version 0.70. Tagged as 'BCM2835-0_70'

The SDIO HAL device reports when it is sure fixed disc media is attached (ie. eMMC soldered on the same PCB) which causes SDFS to report this to FileCore as a fixed disc, skipping the removable safety checks.
However, CM3 and CM3L both return the same board id so we can't work out which is which. Additionally, someone could attach an external eMMC in theory on a custom expansion board (instead of an SD card socket like the CMIO has).
To resolve this, we assign IO expander line 6 of U8 to be a safety catch. If that line is held low, it signifies this is definitely a CM3 - in effect this is a "definitely has eMMC" or "maybe has eMMC" switch.

Tested on CM1, CM3, CM3L, and a suitably modified CM3 with the help of Chris Hall.

Version 0.69. Tagged as 'BCM2835-0_69'

Remove the baffling double indirection of RamAd (and unused exports SerNo and MacAdd), and treat these the same as the other pre-HAL_Init query results.
This means the scope of the tagbuffer is limited to Messaging.s, rather than having to be kept preserved globally.
Use memcpy() to copy tag list to tagbuffer for clarity.
Tested on a Pi 3.

Version 0.68. Tagged as 'BCM2835-0_68'

In HAL_QueryPlatform a mixture of register naming overlooks r6 (aka v3) gets used, but not preserved.
Uppercase opcodes, add a few more comments around the CRC calculation.

Some misleading notes about IIC0, and other minor clarifications.

Detail:
  Move the register accesses for GPIO to the HAL, since they are hardware specific.
  Add recognition of board types for Pi 3, Compute module 3, rev 3 Pi 0's, and the newer Pi 2's with BCM2837 on them.
Admin:
  Based in part on a submission from Tank.
  Tested on a Pi 2. Requires corresponding GPIO module (tag GPIO-1_00-1_11_2_1 or later).

Version 0.67. Tagged as 'BCM2835-0_67'

Detail:
  hdr/BCM2835 - Add switch to allow GPIOs 22-27 to be reconfigured for ARM JTAG access
  s/Top - Configure GPIOs for JTAG if switch enabled
  s/GPIO - Disable GPIO HAL device if JTAG enabled (try and avoid any software messing with the pins)
Admin:
  Tested on Raspberry Pi 1 B, B+


Version 0.66. Tagged as 'BCM2835-0_66'

Detail:
  s/Top - Update internal HAL debug functions to preserve all the required registers; the new HAL_Debug / UART function implementations corrupt more of the caller-save registers than the old ones did
Admin:
  Tested on Raspberry Pi


Version 0.65. Tagged as 'BCM2835-0_65'

Detail:
  Look at the reset status register and use the HADPOR flag to influence the OSStartFlag_POR value.
  Fixes problem of OS_Byte 253 always reporting a hard reset, never a power on reset.
Admin:
  Tested on a Pi 2.
  Submission for USB bounty.

Version 0.64. Tagged as 'BCM2835-0_64'

Detail:
  s/UART - Update HAL_UARTReceiveByte to clear error IRQs when the FIFO is believed to be empty. Disable IRQs in some complex routines to prevent any re-entrancy issues, and also clear the RX threshold IRQ when flushing the FIFOs or adjusting the threshold level.
Admin:
  Tested on Raspberry Pi 1
  Resolves ticket #429


Version 0.63. Tagged as 'BCM2835-0_63'

Detail:
  Useful if not just SDIO can see the definitions.

Version 0.62. Tagged as 'BCM2835-0_62'

The Pi is unusual in self modifying the ROM image when a CMOS setting was changed (due to there being none on the PCB), with the potential of ending up with a corrupt OS image on disc.
Remove this code and emulate the CMOS using normal RAM, and using the Pi firmware to load the CMOS file in for us (like fatload does on OMAP based designs) by using its ability to load a second arbitrary file at an address, intended in the Linux world to load a disc image.

To use this you will need to add
  ramfsfile=CMOS
  ramfsaddr=0x508000
to config.txt which loads it 5MB (ie. ImageSize) above the default load address (&8000), though as noted in the changes to BCM2835-0_60 we don't really need to load at offset &8000 but generally do since that's the Pi firmware's default.

hdr/StaticWS:
New workspace to hold our CMOS copy.
CMOS.s:
Remove the 2k magic block, add a simple bytewise copy loop implementation.
SDIO.s:
Extend ADR range.
Top.s:
Copy what the Pi firmware loads somewhere safe until the MMU is on, then copy it back (converting from logical to physical order along the way).
Change other values recovered from pre-MMU times using advanced post indexed addressing technology (TM) rather than switching around sb a lot.

Tested on a Pi 3, with and without an initial CMOS file present.

Version 0.61. Tagged as 'BCM2835-0_61'

IIC.s/Stubs.s:
Don't import workspace when it's not used
Top.s:
Move the dead loops to just after the vectors. In practice these are ineffectual because the firmware (now) loads the image at &8000 to please Linux, so we're mostly wasting our time producing ROM images with vectors at the start.
Pad image to &8000 so it can be loaded at 0 (using Kernel_Old=1 in config.txt) or &8000 (default).
Line up/capitalise a few stray mnemonics, use APCS register naming.
Call HAL_DebugTXStrInline for "HAL Init completed" rather than an inline loop, since earlier in the same function we called HAL_DebugTXStrInline happily.

Version 0.60. Tagged as 'BCM2835-0_60'

Detail:
  hdr/BCM2835, hdr/StaticWS, s/Debug, s/Top, s/Video - Fix up the two serial debug switches to work correctly. Disable debug by default.
  s/UART, hdr/UART - Implement HAL UART API, for the PL011 UART.
Admin:
  Tested on Raspberry Pi 1 B
  Requires DualSerial 0.25 to work correctly


Version 0.59. Tagged as 'BCM2835-0_59'

Detail:
  s/SDIO - Add a GET of Hdr:CPU.Arch, as it's now required for use of the DivRem macro
Admin:
  Tested on Raspberry Pi


Version 0.58. Tagged as 'BCM2835-0_58'

Detail:
  s/SDIO - Signed counter wrap-around once &80007fff was reached was causing the code to think the activity LED was permanently off, resulting in the code only making "turn on" requests. Calculating the difference as a (signed) 16bit value solves the problem.
Admin:
  Tested on Pi 3 B
  Fixes SD activity LED being stuck on after e.g. letting Verify run for a few seconds.


Version 0.57. Tagged as 'BCM2835-0_57'

Detail:
  s/Top - Fix cores sat in the holding pattern waiting on a write to the wrong address. Also, set up lr so we can return to the holding pattern if desired.
Admin:
  Tested on Pi 3 B
  Now possible to launch simple code sequences on the other cores


Version 0.56. Tagged as 'BCM2835-0_56'

Detail:
  s/Top - On multi-core chips, the ARM boot stub has the other cores sat waiting in a loop near &0. Clearing RAM will inadvertantly break them out of this and most likely cause random crashes later on, so inbetween relocating the ROM and clearing RAM make sure we put the cores into a sleep loop in the HAL. Further mailbox writes can then be used to break them out of this loop, using a similar scheme to that used to break them out of the boot stub loop.
  hdr/BCM2835 - Add some register definitions from the BCM2836 docs
Admin:
  Tested on Pi 2B, 3B
  Not currently dealing with kernel_old=1 case where all cores enter the ROM on startup


Version 0.55. Tagged as 'BCM2835-0_55'

Detail:
  hdr/BCM2835 - Remove mailbox definitions - use the ones exported by BCMSupport to avoid needless duplication
  hdr/StaticWS, s/Messaging, s/Top - Use the mailbox property interface to request & map in the virtual GPIO buffer (if present)
  s/SDIO - On the Pi 3B, the GPIO that was used for the SD activity GPIO is now used for a different purpose. To control the activity LED we need to go via an I2C attached GPIO extender, which itself is exposed to the ARM via the new "virtual GPIO" buffer
  s/VCHIQ - Update to use BCMSupport mailbox definitions
Admin:
  Tested on Pi 1B, 3B


Version 0.54. Tagged as 'BCM2835-0_54'