Commit d4f21a61 authored by Robert Sprowson's avatar Robert Sprowson Committed by ROOL

Extend the PCI address table for 64b

The USB controller is at physical addresses outside 32b range, extend so that it can be picked up by PCI manager, and hence use its SWIs (rather than *Memory P) to see registers.
Also write the interrupt number into the config space so it can be picked up.
Requires PCI-0_18.
parent ae6f7f27
......@@ -167,6 +167,12 @@ PCI_Init ROUT
MOV a1, #0 ; VL805 is dev/bus/fn 0
BL HAL_PCIWriteConfigByte
MOV a4, #iDev_Ext_PCIe_IntA
MOV a3, #PCIConf0_InterruptLine
MOV a2, #0
MOV a1, #0 ; VL805 is dev/bus/fn 0
BL HAL_PCIWriteConfigByte
; PCI side of outbound window
MOV a1, #PCIWinMemBaseLo
LDR a3, =PCIe_PCI_MEM_LO_WIN0
......@@ -257,8 +263,8 @@ HAL_PCIReadConfigWord
HAL_PCIAddresses ROUT
Push "v1, lr"
CMP a2, #7*4
MOVCS a3, #7*4
CMP a2, #10*4
MOVCS a3, #10*4
MOVCC a3, a2
MOV v1, a3 ; The smaller of the two
ADR a2, %FT10
......@@ -267,13 +273,17 @@ HAL_PCIAddresses ROUT
MOV a1, v1
Pull "v1, pc"
10
DCD 0 ; Memory space description
; Memory space description
DCD CPUWinMemBaseLo
DCD CPUWinMemBaseHi
DCD 0
DCD CPUWinMemSize
; IO space description
DCQ 0
DCD 0
DCD &1000
DCD 0 ; IO space description
DCD 0
DCD &1000
DCD 0 ; Inbound RAM adjustment
; Inbound RAM adjustment
DCQ 0
HAL_PCISlotTable ROUT
CMP a2, #4 + 8
......
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