Commit d05a29d9 authored by Jeffrey Lee's avatar Jeffrey Lee
Browse files

Improve RAM detection/setup code. Update mailbox code in DMA driver.

Detail:
  s/Top - Improved RAM detection/setup to not assume that the OS image is at &0000 (current start.elf seems to place it at &8000). New code correctly supports compressed ROMs, and has some basic code implemented to read the RAM setup from the mailbox property interface (currently disabled, pending official firmware rollout + final testing)
  s/DMA - Updated mailbox property interface code to adhere to the current spec. Still needs testing with release firmware (the start.elf I'm using seems to report no DMA channels as being available)
Admin:
  Tested with a release start.elf (July 9th, or thereabouts) as well as a more recent test version containing initial mailbox property interface implementation
  Fixes issue with last 32K of ROM being wiped on startup


Version 0.13. Tagged as 'BCM2835-0_13'
parent 288a5a15
......@@ -11,13 +11,13 @@
GBLS Module_HelpVersion
GBLS Module_ComponentName
GBLS Module_ComponentPath
Module_MajorVersion SETS "0.12"
Module_Version SETA 12
Module_MajorVersion SETS "0.13"
Module_Version SETA 13
Module_MinorVersion SETS ""
Module_Date SETS "15 Jul 2012"
Module_ApplicationDate SETS "15-Jul-12"
Module_Date SETS "17 Jul 2012"
Module_ApplicationDate SETS "17-Jul-12"
Module_ComponentName SETS "BCM2835"
Module_ComponentPath SETS "mixed/RiscOS/Sources/HAL/BCM2835"
Module_FullVersion SETS "0.12"
Module_HelpVersion SETS "0.12 (15 Jul 2012)"
Module_FullVersion SETS "0.13"
Module_HelpVersion SETS "0.13 (17 Jul 2012)"
END
/* (0.12)
/* (0.13)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.12
#define Module_MajorVersion_CMHG 0.13
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 15 Jul 2012
#define Module_Date_CMHG 17 Jul 2012
#define Module_MajorVersion "0.12"
#define Module_Version 12
#define Module_MajorVersion "0.13"
#define Module_Version 13
#define Module_MinorVersion ""
#define Module_Date "15 Jul 2012"
#define Module_Date "17 Jul 2012"
#define Module_ApplicationDate "15-Jul-12"
#define Module_ApplicationDate "17-Jul-12"
#define Module_ComponentName "BCM2835"
#define Module_ComponentPath "mixed/RiscOS/Sources/HAL/BCM2835"
#define Module_FullVersion "0.12"
#define Module_HelpVersion "0.12 (15 Jul 2012)"
#define Module_LibraryVersionInfo "0:12"
#define Module_FullVersion "0.13"
#define Module_HelpVersion "0.13 (17 Jul 2012)"
#define Module_LibraryVersionInfo "0:13"
......@@ -160,15 +160,16 @@ DMAL_IRQs
DMA_InitDevices ROUT
Entry "v1-v5"
LDR v5, =1<<4 ; Default mask of which channels we're allowed to use (from Linux)
[ {FALSE} ; Mailbox property interface isn't implemented yet
[ {FALSE} ; Mailbox property interface isn't fully implemented yet
; Query the VC to find out which DMA channels we're allowed to use
LDR a1, NCNBAddr
MOV a2, #24
MOV a2, #28
MOV a3, #0
LDR a4, =ARM2VC_Tag_GetDMAChannels
MOV v1, #0
MOV v2, #ARM2VC_Tag_End
MOV v3, #0 ; (spare word for DMAChannels response)
MOV v1, #4
MOV v2, #0
MOV v3, #0
MOV v4, #ARM2VC_Tag_End
STMIA a1, {a2-v3}
DoMemBarrier lr
LDR a2, NCNBPhysAddr
......@@ -187,7 +188,7 @@ DMA_InitDevices ROUT
DoMemBarrier lr
LDR a2, NCNBAddr
[ DMADebug
MOV a3, #24
MOV a3, #28
04
LDR a1, [a2], #4
BL HAL_DebugHexTX4
......@@ -202,14 +203,14 @@ DMA_InitDevices ROUT
; Scan for our tag in the response
LDR a3, [a2], #8
08
SUBS a3, a3, #8
SUBS a3, a3, #12
BLE %FT09 ; No space for a tag
LDMIA a2!, {a4,v1}
LDMIA a2!, {a4,v1,v2}
CMP a4, #ARM2VC_Tag_End
BEQ %FT09
LDR v2, =ARM2VC_Tag_GetDMAChannels
CMP a4, v2 ; right tag?
CMPEQ v1, #4 ; right length?
LDR v3, =ARM2VC_Tag_GetDMAChannels
CMP a4, v3 ; right tag?
CMPEQ v2, #&80000004 ; response of right length?
ADDNE v1, v1, #3
BICNE v1, v1, #3
ADDNE a2, a2, v1
......
......@@ -367,7 +367,7 @@ start MSR CPSR_c,#F32_bit+I32_bit+SVC32_mode
bl HAL_DebugHexTX4
]
]
[ HALDebug
[ SCR32
......@@ -511,30 +511,162 @@ atag_next
ADDNE v3, v3, a2, LSL #2
BNE atags_loop
|
ROMTOP * 6 <<20
RAMTOP * 128 <<20
; debug hack to force 128meg ram and 6meg rom
MOV v2, #ROMTOP ;start of available RAM, after HAL + OS image
MOV a1, #RAMTOP ; end of RAM
; Determine how much RAM we have available
[ {FALSE} ; Below code believed to work OK with a test start.elf, but need to retest with a release version to be sure
MOV v7, sp
BIC sp, sp, #31
SUB sp, sp, #32
MOV a1, sp ; buffer for mailbox message
MOV a2, #32
MOV a3, #0
LDR a4, =ARM2VC_Tag_GetARMMemory
MOV v1, #8 ; Assume only 1 RAM block (8 byte response buffer)
MOV v2, #0
MOV v3, #0
MOV v4, #0
MOV v5, #ARM2VC_Tag_End
STMIA a1, {a2-v5}
DoMemBarrier lr
ORR a2, a1, #MB_Chan_ARM2VC
LDR a3, FB_CacheMode
ADD a2, a2, a3
LDR a3, mbox_addr
STR a2, [a3, #MB_ChWr] ; send command
getram_01
LDR a1, [a3,#MB_Sta]
TST a1, #MB_Sta_Empty
BNE getram_01
LDR a1, [a3,#MB_ChRd]
CMP a1, a2
BNE getram_01
; Default response: 128MB of RAM at &0
MOV v3, #0
MOV v4, #128<<20
; Check response
DoMemBarrier lr
MOV a2, sp
[ HALDebug
MOV a3, #32
getram_04
LDR a1, [a2], #4
BL HAL_DebugHexTX4
SUBS a3, a3, #4
BNE getram_04
BL HAL_DebugTXStrInline
DCB "GetARMMemory response",10,0
MOV a2, sp
]
LDR a1, [a2, #4]
CMP a1, #&80000000
BNE getram_09
; Scan for our tag in the response
LDR a3, [a2], #8
getram_08
SUBS a3, a3, #12
BLE getram_09 ; No space for a tag
LDMIA a2!, {a4,v1,v2}
CMP a4, #ARM2VC_Tag_End
BEQ getram_09
LDR v3, =ARM2VC_Tag_GetARMMemory
CMP a4, v3 ; right tag?
CMPEQ v2, #&80000008 ; response of right length?
ADDNE v1, v1, #3
BICNE v1, v1, #3
ADDNE a2, a2, v1
SUBNE a2, a2, v1
BNE getram_08
LDMIA a2, {v3,v4}
getram_09
MOV sp, v7
|
; Assume 128MB of RAM at &0
MOV v3, #0
MOV v4, #128<<20
]
[ HALDebug
ADRL a1, reset
BL HAL_DebugHexTX4
MOV a1, v3
BL HAL_DebugHexTX4
MOV a1, v4
BL HAL_DebugHexTX4
BL HAL_DebugTXStrInline
DCB "ROM start, RAM start, RAM size", 10, 0
]
relocate_code
; Relocate ROM to high end of RAM
ADRL v1, HAL_Base + OSROM_HALSize
LDR v2, [v1, #OSHdr_ImageSize]
LDR lr, [v1, #OSHdr_Flags]
TST lr, #OSHdrFlag_SupportsCompression
LDRNE lr, [v1, #OSHdr_CompressedSize]
MOVEQ lr, v2
SUB v1, v1, #OSROM_HALSize ; Start of HAL
ADD v2, v2, #OSROM_HALSize ; Size of HAL+OS
ADD lr, lr, #OSROM_HALSize ; Size of compressed HAL+OS
ADD v5, v1, lr ; End of OS
ADD v7, v3, v4 ; End of RAM
SUB ip, v7, v2 ; New start address of HAL
CMP v1, ip
BEQ relocate_10 ; No copy needed
CMP v1, v7
BHI relocate_20 ; We're in some ROM above RAM. OK to continue with copy.
CMP v5, ip
BLS relocate_20 ; We're in some ROM/RAM below our copy destination. OK to continue with copy.
; Else we currently overlap the area we want to copy ourselves into.
SUB ip, v1, lr ; Copy the HAL+OS to just before itself.
relocate_20
MOV a1, ip ; Copy dest
MOV a2, v1 ; Copy source
MOV a3, lr ; Copy length
relocate_30
LDR a4, [a2], #4
SUBS a3, a3, #4
STR a4, [a1], #4
BGT relocate_30
MOV a1, #0
MCR p15, 0, a1, c7, c10, 4 ; drain write buffer
MCR p15, 0, a1, c7, c5, 0 ; invalidate I-Cache
; Jump to our new copy
ADR a1, relocate_code
SUB a2, ip, v1
ADD a1, a1, a2 ; relocate our branch target
ADD v8, v8, a2 ; Update OS entry table ptr
MOV pc, a1
relocate_10
; Copy completed, reset stack & workspace ptrs
ADD sp, v3, #4096 ; Use RAM for stack instead of bits of ROM
ADRL sb, workspace ; However workspace is still in ROM :(
[ HALDebug
BL HAL_DebugTXStrInline
DCB "ROM relocated", 10, 0
ALIGN
]
; Clear RAM
; v3 is start of RAM
; ip is end of RAM/start of ROM
; Note this code will clear the stack, but there shouldn't be anything on it yet anyway
MOV a1, ip
MOV a2, #0
MOV a3, #0
MOV a4, #0
MOV v1, #0
MOV v4, #0
MOV v5, #0
MOV v7, #0
MOV ip, #0
MOV lr, #0
clear_lp1
STMDB a1!,{a2-a4,v4,v5,v7,ip,lr}
STMDB a1!,{a2-a4,v4,v5,v7,ip,lr}
STMDB a1!,{a2-a4,v4,v5,v7,ip,lr}
STMDB a1!,{a2-a4,v4,v5,v7,ip,lr}
CMP a1, v2
STMDB a1!,{a2-a4,v1,v4,v5,v7,lr}
STMDB a1!,{a2-a4,v1,v4,v5,v7,lr}
STMDB a1!,{a2-a4,v1,v4,v5,v7,lr}
STMDB a1!,{a2-a4,v1,v4,v5,v7,lr}
CMP a1, v3
BHI clear_lp1
mov a2, v2
ADD a3, a2, #RAMTOP ; end of RAM
SUB a3, a3, #ROMTOP ; less what is used
mov a2, v3
MOV a3, ip
mov a1,a2
bl HAL_DebugHexTX4
mov a1,a3
......@@ -547,8 +679,6 @@ clear_lp1
STR a1,[sp] ;ref for next call
]
[ HALDebug
ADR R0,start_os
BL output_text
......
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