Commit bfa96cd9 authored by Ben Avison's avatar Ben Avison
Browse files

Initial import of BCM2835 (Raspberry Pi) HAL

Detail:
  Covers the basic functionality, but does require a customised start.elf
  to function. The vast majority is an entirely new implementation and is
  BSD licenced, but 4% (the Makefile and a handful of simple macros) are
  copied from pre-existing Castle-licenced code, so it lives under the
  "mixed" hierarchy. If other HALs are anything to go by, we'll end up
  having to add more Castle code (at least some C runtime functions) so it's
  probably juast as well.
Admin:
  Code received from Adrian Lees
parents
hdr/** gitlab-language=armasm linguist-language=armasm linguist-detectable=true
s/** gitlab-language=armasm linguist-language=armasm linguist-detectable=true
Most files are distributed under the New BSD License:
Copyright (c) 2012-2017, RISC OS Open Ltd
Copyright (c) 2012, Adrian Lees
Copyright (c) 2012, Dave Higton
Copyright (c) 2012, John Ballance
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# Copyright 2012 Castle Technology Ltd
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# Makefile for BCM2835 HAL
#
COMPONENT = BCM2835 HAL
TARGET = BCM2835
OBJS = Top CMOS Debug Display Stubs UART USB Video
HDRS =
CMHGFILE =
CUSTOMRES = custom
CUSTOMROM = custom
ROM_TARGET = custom
LNK_TARGET = custom
AIFDBG = aif._BCM2835
#include StdRules
#include StdTools
include CModule
CCFLAGS += -ff -APCS 3/32bit/nofp/noswst
ASFLAGS += -APCS 3/nofp/noswst
AASMFLAGS += -APCS 3/nofp/noswst
resources:
@${ECHO} ${COMPONENT}: no resources
rom: aof.${TARGET}
@${ECHO} ${COMPONENT}: rom module built
_debug: ${GPADBG}
@echo ${COMPONENT}: debug image built
install_rom: linked.${TARGET}
${CP} linked.${TARGET} ${INSTDIR}.${TARGET} ${CPFLAGS}
@echo ${COMPONENT}: rom module installed
aof.${TARGET}: ${ROM_OBJS_} ${ROM_LIBS} ${DIRS} ${ROM_DEPEND}
${LD} -o $@ -aof ${ROM_OBJS_} ${ROM_LIBS}
linked.${TARGET}: aof.${TARGET}
${LD} ${LDFLAGS} ${LDLINKFLAGS} -o $@ -bin -base 0xFC000000 aof.${TARGET}
${AIFDBG}: ${ROM_OBJS_} ${ROM_LIBS}
${MKDIR} aif
${LD} -aif -bin -d -o ${AIFDBG} ${ROM_OBJS_} ${ROM_LIBS}
#${GPADBG}: ${AIFDBG}
# ToGPA -s ${AIFDBG} ${GPADBG}
# Dynamic dependencies:
Dir <Obey$Dir>
amu_machine clean
stripdepnd
Dir <Obey$Dir>
amu_machine rom _debug linked.BCM2835 THROWBACK=-throwback
;
; Copyright (c) 2012, RISC OS Open Ltd
; Copyright (c) 2012, Adrian Lees
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of RISC OS Open Ltd nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; With many thanks to Broadcom Europe Ltd for releasing the source code to
; its Linux drivers, thus making this port possible.
;
; VideoCore sets up the following address windows for use by the ARM core:
; - &08000000 -> &7E000000 : 4MB window granting access to peripherals
; - &08800000 -> &7E800000 : 4MB window granting access to USB peripheral
[ :LNOT :DEF: BCM2835_Hdr
GBLL BCM2835_Hdr
GBLL HALDebug
HALDebug SETL {TRUE}
GBLL ExtFramestore
ExtFramestore SETL {TRUE}
; Peripheral address space
PERI_BASE * &08000000
;PERI2_BASE * &08800000
; Offsets from peripheral base address
ST_BASE * &3000 ;System Timer 0
DMA_BASE * &7000 ;DMA controller
PM_BASE * &100000 ;Power management
UART0_BASE * &201000 ;UART 0
UART1_BASE * &215000 ;UART 1
INTC_BASE * &B200 ;Interrupt controller
USB_BASE * &980000 ;USB controller
ISP_BASE * &A00000 ;ISP
; DMA registers
DMA0_CS * 0
DMA0_CONBLK_AD * 4
DMA0_DEBUG * &20
; DMA control block
^ 0
DMAcb_info # 4
DMAcb_src # 4
DMAcb_dst # 4
DMAcb_length # 4
DMAcb_stride # 4
DMAcb_next # 4
DMAcb_pad0 # 4
DMAcb_pad1 # 4
sizeof_DMAcb * @
]
END
; Copyright 2012 Castle Technology Ltd
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
; http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;
MACRO
HALEntry $name
ASSERT (. - HAL_EntryTable) / 4 = EntryNo_$name
DCD $name - HAL_EntryTable
MEND
MACRO
NullEntry
DCD HAL_Null - HAL_EntryTable
MEND
MACRO
CallOSM $entry, $reg
LDR ip, [v8, #$entry*4]
MOV lr, pc
ADD pc, v8, ip
MEND
MACRO
CallOS $entry, $tailcall
ASSERT $entry <= HighestOSEntry
[ "$tailcall"=""
MOV lr, pc
|
[ "$tailcall"<>"tailcall"
! 0, "Unrecognised parameter to CallOS"
]
]
LDR pc, OSentries + 4*$entry
MEND
END
;
; Copyright (c) 2012, RISC OS Open Ltd
; Copyright (c) 2012, Adrian Lees
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of RISC OS Open Ltd nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; With many thanks to Broadcom Europe Ltd for releasing the source code to
; its Linux drivers, thus making this port possible.
;
GET Hdr:OSEntries
GET hdr.BCM2835
GBLL SCR32
SCR32 SETL {TRUE}
sb RN 9
^ 0,sb
PeriBase # 4
;Peri2Base # 4
UARTFCRSoftCopy # 4
DMAcb # sizeof_DMAcb
ScreenBase # 4
FTextPixel # 4
BTextPixel # 4
FTextPixRepl # 4
BTextPixRepl # 4
BitsPerPixel # 4
InvertFont # 4
InvertPixel # 4
Columns # 4
Rows # 4
OutputX # 4
OutputY # 4
BytesPerRow # 4
BytesPerChar # 4
LastInt # 4
KM_State # 4
KM_Num # 4
KM_NumY # 4
PixelTable # 256*4
CurAddr # 4
CurHeight # 4
CurPalette # 4*4
WSPhysAddr # 4 ;physical address of HAL workspace
OSheader # 4
OSentries # 4*(HighestOSEntry+1)
CurUnder # 32*4*32
CurShape # 32/4*32
HAL_WsSize * :INDEX:@
sizeof_workspace * :INDEX:@
END
;
; Copyright (c) 2012, RISC OS Open Ltd
; Copyright (c) 2012, Adrian Lees
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of RISC OS Open Ltd nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; With many thanks to Broadcom Europe Ltd for releasing the source code to
; its Linux drivers, thus making this port possible.
;
UART011_DR * 0
UART011_RSR * 4
UART011_ECR * 4
UART011_CR * &30
UART011_FR * &18
UART011_FBRD * &28
UART011_IBRD * &24
UART011_LCRH * &2C
END
;
;Copyright(c)2012, RISC OS Open Ltd
; Copyright (c) 2012, Adrian Lees
;Allrightsreserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; * Neither the name of RISC OS Open Ltd nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
;
; With many thanks to Broadcom Europe Ltd for releasing the source code to
; its Linux drivers, thus making this port possible.
;
AREA |ARM$$data|, CODE, READONLY, PIC
EXPORT cmos
cmos
DCD &eb00fe00
DCD &00001a00
DCD &54100000
DCD &2c0a0820
DCD &00000290
DCD &00000000
DCD &00000000
DCD &00000703
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &01000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &00000000
DCD &0000140b
DCD &40ff7ca4
DCD &00c101ff