[490] Fix for pull up/down settings

Detail:
  The offset to the pull up/down clock register was computed in v4 but then v2 was used instead.

Version 0.87. Tagged as 'HAL_BCM2835-0_87'

VersionNum

-/* (0.86)
+/* (0.87)
  *
  * This file is automatically maintained by srccommit, do not edit manually.
  *
  */
-#define Module_MajorVersion_CMHG        0.86
+#define Module_MajorVersion_CMHG        0.87
 #define Module_MinorVersion_CMHG
-#define Module_Date_CMHG                19 Jun 2020
+#define Module_Date_CMHG                22 Jun 2020
 
-#define Module_MajorVersion             "0.86"
-#define Module_Version                  86
+#define Module_MajorVersion             "0.87"
+#define Module_Version                  87
 #define Module_MinorVersion             ""
-#define Module_Date                     "19 Jun 2020"
+#define Module_Date                     "22 Jun 2020"
 
-#define Module_ApplicationDate          "19-Jun-20"
+#define Module_ApplicationDate          "22-Jun-20"
 
 #define Module_ComponentName            "HAL_BCM2835"
 
-#define Module_FullVersion              "0.86"
-#define Module_HelpVersion              "0.86 (19 Jun 2020)"
-#define Module_LibraryVersionInfo       "0:86"
+#define Module_FullVersion              "0.87"
+#define Module_HelpVersion              "0.87 (22 Jun 2020)"
+#define Module_LibraryVersionInfo       "0:87"

s/GPIO

@@ -831,7 +831,7 @@ GPIO_Pull_Common
 
         MOV     a1, #0                  ; rest
         STR     a1, [v1, #GPPUPDEN]
-        STR     a1, [v1, v2]
+        STR     a1, [v1, v4]
         EXIT
 10
         Push    "a2, lr"
@@ -839,7 +839,7 @@ GPIO_Pull_Common
         MOV     a1, #50                 ; guess
         BL      HAL_CounterDelay
         Pull    "a2, lr"
-        STR     a2, [v1, v2]
+        STR     a2, [v1, v4]
         MOV     a1, #50                 ; guess
         B       HAL_CounterDelay