Commit 7f397181 authored by Ben Avison's avatar Ben Avison Committed by ROOL

Support new Pi models

* Raspberry Pi 400: verified as booting to desktop.
* Compute Module 3+: some changes to SD support to make it behave like the
  plain Compute Module 3 (previously it was falling into the model B+ code
  path and setting up GPIO in the expectation that an activity LED was
  attached, which is not a given for a Compute Module). Not tested.
* Compute Module 4: tentative support added. Not tested. In particular, we
  don't know what the revision numbers will be yet, so the entries in
  `GPIO_Board_Conversion_Table` may not match real hardware.
* SD subsystem now assumes any future models are similar to the Pi 4 and 400,
  and thus we're more likely that they will "just work" out of the box.

Version 0.92. Tagged as 'HAL_BCM2835-0_92'
parent 0a5cd22b
/* (0.91) /* (0.92)
* *
* This file is automatically maintained by srccommit, do not edit manually. * This file is automatically maintained by srccommit, do not edit manually.
* *
*/ */
#define Module_MajorVersion_CMHG 0.91 #define Module_MajorVersion_CMHG 0.92
#define Module_MinorVersion_CMHG #define Module_MinorVersion_CMHG
#define Module_Date_CMHG 10 Oct 2020 #define Module_Date_CMHG 14 Nov 2020
#define Module_MajorVersion "0.91" #define Module_MajorVersion "0.92"
#define Module_Version 91 #define Module_Version 92
#define Module_MinorVersion "" #define Module_MinorVersion ""
#define Module_Date "10 Oct 2020" #define Module_Date "14 Nov 2020"
#define Module_ApplicationDate "10-Oct-20" #define Module_ApplicationDate "14-Nov-20"
#define Module_ComponentName "HAL_BCM2835" #define Module_ComponentName "HAL_BCM2835"
#define Module_FullVersion "0.91" #define Module_FullVersion "0.92"
#define Module_HelpVersion "0.91 (10 Oct 2020)" #define Module_HelpVersion "0.92 (14 Nov 2020)"
#define Module_LibraryVersionInfo "0:91" #define Module_LibraryVersionInfo "0:92"
...@@ -362,6 +362,8 @@ BoardRevision_Model_B3Plus * 13 :SHL: BoardRevision_Model_Shift ...@@ -362,6 +362,8 @@ BoardRevision_Model_B3Plus * 13 :SHL: BoardRevision_Model_Shift
BoardRevision_Model_A3Plus * 14 :SHL: BoardRevision_Model_Shift BoardRevision_Model_A3Plus * 14 :SHL: BoardRevision_Model_Shift
BoardRevision_Model_Compute3Plus * 16 :SHL: BoardRevision_Model_Shift BoardRevision_Model_Compute3Plus * 16 :SHL: BoardRevision_Model_Shift
BoardRevision_Model_B4 * 17 :SHL: BoardRevision_Model_Shift BoardRevision_Model_B4 * 17 :SHL: BoardRevision_Model_Shift
BoardRevision_Model_400 * 19 :SHL: BoardRevision_Model_Shift
BoardRevision_Model_Compute4 * 20 :SHL: BoardRevision_Model_Shift
BoardRevision_Rev_Shift * 0 BoardRevision_Rev_Shift * 0
BoardRevision_Rev_Mask * 15 :SHL: BoardRevision_Rev_Shift BoardRevision_Rev_Mask * 15 :SHL: BoardRevision_Rev_Shift
......
...@@ -216,6 +216,8 @@ GPIORevision_RaspberryPi_Mk3_BPlus # 1 ; Model Pi 3 B+ ...@@ -216,6 +216,8 @@ GPIORevision_RaspberryPi_Mk3_BPlus # 1 ; Model Pi 3 B+
GPIORevision_RaspberryPi_Mk3_APlus # 1 ; Model Pi 3 A+ GPIORevision_RaspberryPi_Mk3_APlus # 1 ; Model Pi 3 A+
GPIORevision_RaspberryPi_C_3Plus # 1 ; Model CM3+ GPIORevision_RaspberryPi_C_3Plus # 1 ; Model CM3+
GPIORevision_RaspberryPi_Mk4_B # 1 ; Model Pi 4 B GPIORevision_RaspberryPi_Mk4_B # 1 ; Model Pi 4 B
GPIORevision_RaspberryPi_400 # 1 ; Raspberry Pi 400
GPIORevision_RaspberryPi_C_4 # 1 ; Model CM4
GPIORevision_RaspberryPi_Max # 0 GPIORevision_RaspberryPi_Max # 0
Name_B_1 = "Raspberry Pi B PCB 1.0", 0 Name_B_1 = "Raspberry Pi B PCB 1.0", 0
...@@ -233,6 +235,8 @@ Name_Mk3_BPlus = "Raspberry Pi 3 Model B+", 0 ...@@ -233,6 +235,8 @@ Name_Mk3_BPlus = "Raspberry Pi 3 Model B+", 0
Name_Mk3_APlus = "Raspberry Pi 3 Model A+", 0 Name_Mk3_APlus = "Raspberry Pi 3 Model A+", 0
Name_C_3Plus = "Raspberry Pi Compute Module 3+", 0 Name_C_3Plus = "Raspberry Pi Compute Module 3+", 0
Name_B_4 = "Raspberry Pi 4 Model B", 0 Name_B_4 = "Raspberry Pi 4 Model B", 0
Name_400 = "Raspberry Pi 400", 0
Name_C_4 = "Raspberry Pi Compute Module 4", 0
Name_Unknown = "Raspberry Pi Unknown", 0 Name_Unknown = "Raspberry Pi Unknown", 0
ALIGN ALIGN
...@@ -252,6 +256,8 @@ GPIO_Board_Names_Table ; same order as GPIORevision_RaspberryPi types ...@@ -252,6 +256,8 @@ GPIO_Board_Names_Table ; same order as GPIORevision_RaspberryPi types
DCD Name_Mk3_APlus DCD Name_Mk3_APlus
DCD Name_C_3Plus DCD Name_C_3Plus
DCD Name_B_4 DCD Name_B_4
DCD Name_400
DCD Name_C_4
ASSERT (.-GPIO_Board_Names_Table) :SHR: 2 = GPIORevision_RaspberryPi_Max ASSERT (.-GPIO_Board_Names_Table) :SHR: 2 = GPIORevision_RaspberryPi_Max
; Lookup table to determine board type (old style) ; Lookup table to determine board type (old style)
...@@ -331,6 +337,16 @@ GPIO_Board_Conversion_Table ...@@ -331,6 +337,16 @@ GPIO_Board_Conversion_Table
DCD GPIORevision_RaspberryPi_Mk4_B DCD GPIORevision_RaspberryPi_Mk4_B
DCD BoardRevision_Mem_8G+BoardRevision_Model_B4+(4:SHL:BoardRevision_Rev_Shift) DCD BoardRevision_Mem_8G+BoardRevision_Model_B4+(4:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_Mk4_B DCD GPIORevision_RaspberryPi_Mk4_B
DCD BoardRevision_Mem_4G+BoardRevision_Model_400+(0:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_400
DCD BoardRevision_Mem_1G+BoardRevision_Model_Compute4+(0:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_C_4
DCD BoardRevision_Mem_2G+BoardRevision_Model_Compute4+(0:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_C_4
DCD BoardRevision_Mem_4G+BoardRevision_Model_Compute4+(0:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_C_4
DCD BoardRevision_Mem_8G+BoardRevision_Model_Compute4+(0:SHL:BoardRevision_Rev_Shift)
DCD GPIORevision_RaspberryPi_C_4
DCD &FF DCD &FF
; Initialise our HAL devices ; Initialise our HAL devices
...@@ -339,7 +355,7 @@ GPIO_InitDevices ...@@ -339,7 +355,7 @@ GPIO_InitDevices
; Copy dev struct to WS & fill in the non template items ; Copy dev struct to WS & fill in the non template items
ADRL a1, GPIO0Device ADRL a1, GPIO0Device
ADR a2, GPIOTemplate ADRL a2, GPIOTemplate
MOV a3, #HALDevice_GPIO_Size_1_0 MOV a3, #HALDevice_GPIO_Size_1_0
BL memcpy BL memcpy
...@@ -961,6 +977,10 @@ GPIOFreeToUse ...@@ -961,6 +977,10 @@ GPIOFreeToUse
DCD 2_00000000000000000011111111111111 DCD 2_00000000000000000011111111111111
DCD 2_00001111111111111111111111111111 ; 4B DCD 2_00001111111111111111111111111111 ; 4B
DCD 2_00000000000000000000000000000000 DCD 2_00000000000000000000000000000000
DCD 2_00001111111111111111111111111111 ; 400
DCD 2_00000000000000000000000000000000
DCD 2_00001111111111111111111111111100 ; Compute CM4
DCD 2_00000000000000000000000000000000
ASSERT (.-GPIOFreeToUse) :SHR: 3 = GPIORevision_RaspberryPi_Max ASSERT (.-GPIOFreeToUse) :SHR: 3 = GPIORevision_RaspberryPi_Max
; Pin enumerations ; Pin enumerations
......
...@@ -400,13 +400,19 @@ SDIO_InitDevices ROUT ...@@ -400,13 +400,19 @@ SDIO_InitDevices ROUT
CMP a3, #BoardRevision_BPlus_Sony CMP a3, #BoardRevision_BPlus_Sony
TEQ a3, #BoardRevision_Compute_Sony TEQ a3, #BoardRevision_Compute_Sony
TEQNE a3, #BoardRevision_Compute_Embest TEQNE a3, #BoardRevision_Compute_Embest
MOVLO a3, #BoardRevision_Model_B :SHR: BoardRevision_Model_Shift
MOVEQ a3, #BoardRevision_Model_Compute :SHR: BoardRevision_Model_Shift
MOVHI a3, #BoardRevision_Model_BPlus :SHR: BoardRevision_Model_Shift
B %FT02 B %FT02
01 AND a3, a3, #BoardRevision_Model_Mask 01 AND a3, a3, #BoardRevision_Model_Mask
MOV a3, a3, LSR #BoardRevision_Model_Shift
ASSERT BoardRevision_Model_A < BoardRevision_Model_APlus ASSERT BoardRevision_Model_A < BoardRevision_Model_APlus
ASSERT BoardRevision_Model_B < BoardRevision_Model_APlus ASSERT BoardRevision_Model_B < BoardRevision_Model_APlus
CMP a3, #BoardRevision_Model_APlus CMP a3, #BoardRevision_Model_APlus :SHR: BoardRevision_Model_Shift
TEQ a3, #BoardRevision_Model_Compute TEQ a3, #BoardRevision_Model_Compute :SHR: BoardRevision_Model_Shift
TEQNE a3, #BoardRevision_Model_Compute3 TEQNE a3, #BoardRevision_Model_Compute3 :SHR: BoardRevision_Model_Shift
TEQNE a3, #BoardRevision_Model_Compute3Plus :SHR: BoardRevision_Model_Shift
TEQNE a3, #BoardRevision_Model_Compute4 :SHR: BoardRevision_Model_Shift
02 ; So now LO => model A or B, EQ => Compute or Compute3, HI => A+, B+ or Pi 2 or Pi 3 or Pi 0 or Pi 4 02 ; So now LO => model A or B, EQ => Compute or Compute3, HI => A+, B+ or Pi 2 or Pi 3 or Pi 0 or Pi 4
; Activate ; Activate
...@@ -429,7 +435,9 @@ SDIO_InitDevices ROUT ...@@ -429,7 +435,9 @@ SDIO_InitDevices ROUT
ORRHI a1, a1, #HALDeviceSDHCI_SlotFlag_NoCardDetect ORRHI a1, a1, #HALDeviceSDHCI_SlotFlag_NoCardDetect
ORREQ a1, a1, #HALDeviceSDHCI_SlotFlag_IntegratedMem ORREQ a1, a1, #HALDeviceSDHCI_SlotFlag_IntegratedMem
BNE %FT20 BNE %FT20
TEQ a3, #BoardRevision_Model_Compute3 TEQ a3, #BoardRevision_Model_Compute3 :SHR: BoardRevision_Model_Shift
TEQNE a3, #BoardRevision_Model_Compute3Plus :SHR: BoardRevision_Model_Shift
TEQNE a3, #BoardRevision_Model_Compute4 :SHR: BoardRevision_Model_Shift
BNE %FT10 BNE %FT10
LDR a4, SafetyCatch ; Here iff a Compute Module 3 LDR a4, SafetyCatch ; Here iff a Compute Module 3
; Unhelpfully the revision number for both CM3 and CM3L is the same, but we need ; Unhelpfully the revision number for both CM3 and CM3L is the same, but we need
...@@ -452,24 +460,24 @@ SDIO_InitDevices ROUT ...@@ -452,24 +460,24 @@ SDIO_InitDevices ROUT
ADDEQ a1, a1, #SetActivity_Compute - SetActivity_AB ADDEQ a1, a1, #SetActivity_Compute - SetActivity_AB
ADRL a2, GetCardDetect_AB ADRL a2, GetCardDetect_AB
ADDHS a2, a2, #GetCardDetect_BPlus_Compute - GetCardDetect_AB ADDHS a2, a2, #GetCardDetect_BPlus_Compute - GetCardDetect_AB
TEQ a3, #BoardRevision_Model_B3 TEQ a3, #BoardRevision_Model_B3 :SHR: BoardRevision_Model_Shift
TEQNE a3, #BoardRevision_Model_B3Plus TEQNE a3, #BoardRevision_Model_B3Plus :SHR: BoardRevision_Model_Shift
TEQNE a3, #BoardRevision_Model_A3Plus TEQNE a3, #BoardRevision_Model_A3Plus :SHR: BoardRevision_Model_Shift
ADREQL a1, SetActivity_B3 ADREQL a1, SetActivity_B3
TEQ a3, #BoardRevision_Model_B4 TEQ a3, #BoardRevision_Model_B4 :SHR: BoardRevision_Model_Shift
ADREQL a1, SetActivity_B4 ADREQL a1, SetActivity_B4
STR a1, SDHCIDevice + HALDevice_SDHCISetActivity STR a1, SDHCIDevice + HALDevice_SDHCISetActivity
STR a2, SDHCIDevice + HALDevice_SDHCIGetCardDetect STR a2, SDHCIDevice + HALDevice_SDHCIGetCardDetect
; Don't do pin muxing in Activate for any of these boards either ; Don't do pin muxing in Activate for any of these boards either
TEQ a3, #BoardRevision_Model_B3 TEQ a3, #BoardRevision_Model_B3 :SHR: BoardRevision_Model_Shift
TEQNE a3, #BoardRevision_Model_B3Plus TEQNE a3, #BoardRevision_Model_B3Plus :SHR: BoardRevision_Model_Shift
TEQNE a3, #BoardRevision_Model_A3Plus TEQNE a3, #BoardRevision_Model_A3Plus :SHR: BoardRevision_Model_Shift
ADREQ a1, Activate_Compute ADREQ a1, Activate_Compute
STREQ a1, SDHCIDevice + HALDevice_Activate STREQ a1, SDHCIDevice + HALDevice_Activate
TEQ a3, #BoardRevision_Model_B4 CMP a3, #BoardRevision_Model_B4 :SHR: BoardRevision_Model_Shift
ADREQ a1, Activate_B4 ADRHS a1, Activate_B4
STREQ a1, SDHCIDevice + HALDevice_Activate STRHS a1, SDHCIDevice + HALDevice_Activate
; Patch a few things up for Pi 4... ; Patch a few things up for Pi 4...
......
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