Commit 59e36802 authored by Jeffrey Lee's avatar Jeffrey Lee
Browse files

Read board model, revision, and available DMA channels from messaging channel....

Read board model, revision, and available DMA channels from messaging channel. Report board revision via GPIO HAL device. Recover lost ROM relocation code.

Detail:
  hdr/StaticWS, s/Messaging, s/Top - Now reads board model, revision and available DMA channels from messaging channel
  hdr/StaticWS, s/GPIO - Updated GPIO HAL device to report board revision instead of a generic response of 'unknown'
  s/Top - Recovered ROM relocation code that got lost during a merge. End of ROM image no longer being corrupted, and RISC OS now sees correct amount of RAM.
  s/DMA - Ditch old code to read available DMA channels and use value read by HAL_QueryPlatform instead.
Admin:
  Tested on Raspberry Pi (B rev 1) with various start.elf sizes & versions
  DMA channel reporting only available with latest firmware (i.e. 8th Sep)
  Board revision number read by messaging channel seems to match that returned by /proc/cpuinfo on Linux


Version 0.22. Tagged as 'BCM2835-0_22'
parent d56f8a14
......@@ -11,13 +11,13 @@
GBLS Module_HelpVersion
GBLS Module_ComponentName
GBLS Module_ComponentPath
Module_MajorVersion SETS "0.21"
Module_Version SETA 21
Module_MajorVersion SETS "0.22"
Module_Version SETA 22
Module_MinorVersion SETS ""
Module_Date SETS "02 Sep 2012"
Module_ApplicationDate SETS "02-Sep-12"
Module_Date SETS "08 Sep 2012"
Module_ApplicationDate SETS "08-Sep-12"
Module_ComponentName SETS "BCM2835"
Module_ComponentPath SETS "mixed/RiscOS/Sources/HAL/BCM2835"
Module_FullVersion SETS "0.21"
Module_HelpVersion SETS "0.21 (02 Sep 2012)"
Module_FullVersion SETS "0.22"
Module_HelpVersion SETS "0.22 (08 Sep 2012)"
END
/* (0.21)
/* (0.22)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 0.21
#define Module_MajorVersion_CMHG 0.22
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 02 Sep 2012
#define Module_Date_CMHG 08 Sep 2012
#define Module_MajorVersion "0.21"
#define Module_Version 21
#define Module_MajorVersion "0.22"
#define Module_Version 22
#define Module_MinorVersion ""
#define Module_Date "02 Sep 2012"
#define Module_Date "08 Sep 2012"
#define Module_ApplicationDate "02-Sep-12"
#define Module_ApplicationDate "08-Sep-12"
#define Module_ComponentName "BCM2835"
#define Module_ComponentPath "mixed/RiscOS/Sources/HAL/BCM2835"
#define Module_FullVersion "0.21"
#define Module_HelpVersion "0.21 (02 Sep 2012)"
#define Module_LibraryVersionInfo "0:21"
#define Module_FullVersion "0.22"
#define Module_HelpVersion "0.22 (08 Sep 2012)"
#define Module_LibraryVersionInfo "0:22"
......@@ -34,6 +34,7 @@
GET Hdr:HALDevice
GET Hdr:SDHCIDevice
GET Hdr:DMADevice
GET Hdr:GPIODevice
GET hdr.BCM2835
; Per-timer workspace layout
......@@ -101,11 +102,14 @@ ARM_Size # 4
VC_Base # 4
VC_Size # 4
VC_Logical # 4
Board_Model # 4
Board_Revision # 4
ARM_DMAChannels # 4
; align to 16 byte boundary NB this isnt aligned once hal initialised
# (((:INDEX:@)+15):AND::NOT:15)-(:INDEX:@)
! 0,"tagbuffer at ":CC::STR:(&fc001000+:INDEX:@),0
tagbuffer # 256 ;; for now ; platform query buffer
tagbuffer # 300 ; platform query buffer
NCNBAddr # 4 ;NCNB workspace
NCNBPhysAddr # 4 ;VC physical address of NCNB workspace
......@@ -132,6 +136,8 @@ DMAChannels # DMAC_DeviceSize*DMA_CH_Count ; List of channel devices (
VCHIQDevice # HALDevice_VCHIQ_Size
GPIODevice # HALDevice_GPIO_Size
HAL_WsSize * :INDEX:@
sizeof_workspace * :INDEX:@
......
......@@ -159,71 +159,14 @@ DMAL_IRQs
; Initialise our HAL devices
DMA_InitDevices ROUT
Entry "v1-v5"
LDR v5, =1<<4 ; Default mask of which channels we're allowed to use (from Linux)
[ {FALSE} ; Mailbox property interface isn't fully implemented yet
; Query the VC to find out which DMA channels we're allowed to use
LDR a1, NCNBAddr
MOV a2, #28
MOV a3, #0
LDR a4, =ARM2VC_Tag_GetDMAChannels
MOV v1, #4
MOV v2, #0
MOV v3, #0
MOV v4, #ARM2VC_Tag_End
STMIA a1, {a2-v3}
DoMemBarrier lr
LDR a2, NCNBPhysAddr
ORR a2, a2, #MB_Chan_ARM2VC
LDR a3, PeriBase
ADD a3, a3, #MB_Base
STR a2, [a3,#MB_ChWr] ; send command
01
LDR a1, [a3,#MB_Sta]
TST a1, #MB_Sta_Empty
BNE %BT01
LDR a1, [a3,#MB_ChRd]
CMP a1, a2
BNE %BT01
; Check response
DoMemBarrier lr
LDR a2, NCNBAddr
LDR v5, ARM_DMAChannels
[ DMADebug
MOV a3, #28
04
LDR a1, [a2], #4
MOV a1, v5
BL HAL_DebugHexTX4
SUBS a3, a3, #4
BNE %BT04
DebugTX "GetDMAChannels response"
LDR a2, NCNBAddr
]
LDR a1, [a2, #4]
CMP a1, #&80000000
BNE %FT09
; Scan for our tag in the response
LDR a3, [a2], #8
08
SUBS a3, a3, #12
BLE %FT09 ; No space for a tag
LDMIA a2!, {a4,v1,v2}
CMP a4, #ARM2VC_Tag_End
BEQ %FT09
LDR v3, =ARM2VC_Tag_GetDMAChannels
CMP a4, v3 ; right tag?
CMPEQ v2, #&80000004 ; response of right length?
ADDNE v1, v1, #3
BICNE v1, v1, #3
ADDNE a2, a2, v1
SUBNE a2, a2, v1
BNE %BT08
LDR a1, [a2]
[ DMADebug
BL HAL_DebugHexTX4
DebugTX "GetDMAChannels channels"
]
MOV v5, a1
09
]
CMP v5, #0
MOVEQ v5, #1<<4 ; Default mask of which channels we're allowed to use (from Linux)
LDR a1, =(1<<DMA_CH_Count)-1
AND v5, v5, a1 ; Mask with the list of channels that we know how to use
STR v5, DMAFreeChannels
......
......@@ -31,11 +31,11 @@
GET Hdr:ListOpts
GET Hdr:Macros
GET Hdr:Proc
GET Hdr:GPIODevice
GET hdr.BCM2835
GET hdr.StaticWS
EXPORT GPIO_InitDevices
IMPORT memcpy
MACRO
$class HALDeviceField $field, $value
......@@ -76,7 +76,7 @@ GPIO_Dev
HALDeviceField ClearIRQ, 0
HALDeviceField Reserved2, 0
GPIO HALDeviceField Type, GPIOType_BCM2835_RaspberryPi
GPIO HALDeviceField Revision, GPIORevision_RaspberryPi_Unknown
GPIO HALDeviceField Revision, 0 ; Filled in at runtime
ASSERT . - %A0 = HALDevice_GPIO_Size
GPIO_Description
......@@ -84,11 +84,44 @@ GPIO_Description
ALIGN
; Lookup table to determine board type
MACRO
BoardType $model, $minrev, $maxrev, $type
DCD $model
DCD $minrev
DCD $maxrev
DCD GPIORevision_RaspberryPi_$type
MEND
GPIO_BoardTypes
BoardType 0, 2, 3, B_1
BoardType 0, 4, &ffffffff, B_2 ; Only revs 4-6 confirmed so far, but assume anything newer will be compatible so that minor revisions don't trip us up
GPIO_BoardTypes_End
; Initialise our HAL devices
GPIO_InitDevices ROUT
Entry
MOV a1, #0
Entry "v1-v3"
ADRL a1, GPIODevice
ADR a2, GPIO_Dev
MOV a3, #HALDevice_GPIO_Size
BL memcpy
ADR v1, GPIO_BoardTypes
LDR v2, Board_Model
LDR v3, Board_Revision
ADR ip, GPIO_BoardTypes_End
10
CMP v1, ip
EXIT EQ ; Unknown model, give up
LDMIA v1!, {a1-a4}
CMP a1, v2
BNE %BT10
CMP a2, v3
CMPLS v3, a3
BHI %BT10
; Found a match
ADRL a2, GPIODevice
STR a4, [a2, #HALDevice_GPIORevision]
MOV a1, #0
MOV lr, pc
LDR pc, OSentries+4*OS_AddDevice
EXIT
......
......@@ -90,6 +90,8 @@ HAL_SendHostMessage ROUT
; Frame buffer base address for 32bit fb
; Board_MAC address
; Board_Serial
; Board model & revision
; Available DMA channels
;
HAL_QueryPlatform ROUT
STMFD R13!, {r0-r5, lr}
......@@ -128,6 +130,12 @@ lp1 ldr r3, [r0], #4 ; copy to workspace buffer
mov a1,a3
bl HAL_DebugHexTX4
]
LDR r0, [r5, #boardmodel-tagb]
LDR r1, [r5, #boardrev-tagb]
LDR r2, [r5, #dmachans-tagb]
STR r0, Board_Model
STR r1, Board_Revision
STR r2, ARM_DMAChannels
; copy out and construct machine ID from MAC address
ADRL r0, tagbuffer
......@@ -197,8 +205,6 @@ Displ DCD :INDEX:Dispbs - :INDEX:tagb + :INDEX:tagbuffer
; series of VC side query tags. Using inline code as this is writable at this
; stage. This means the answers will be encapsulated in rom image!!
;
; CURRENT ASSIGNED SPACE 256 bytes.. BEWARE
;
tagb DCD tagslen
DCD 0
tagmac DCD ARM2VC_Tag_GetBoardMAC
......@@ -224,6 +230,21 @@ tagvcmem
DCD 0
VCbs DCD 0
VCsz DCD 0
tagboardmodel
DCD ARM2VC_Tag_GetBoardModel
DCD 4
DCD 0
boardmodel DCD 0
tagboardrev
DCD ARM2VC_Tag_GetBoardRevision
DCD 4
DCD 0
boardrev DCD 0
tagdmachans
DCD ARM2VC_Tag_GetDMAChannels
DCD 4
DCD 0
dmachans DCD 0
tagdisplphyswh
DCD ARM2VC_Tag_FBSetPhysDimension
DCD 8
......@@ -270,7 +291,7 @@ Dispbs DCD 0x100000 ; megabyte aligned
Dispsz DCD 0
DCD ARM2VC_Tag_End
tagslen * . - tagb
ASSERT tagslen <= ?tagbuffer
......
......@@ -259,53 +259,95 @@ start MSR CPSR_c,#F32_bit+I32_bit+SVC32_mode
DCB "HalStartup2",10,0
ALIGN
]
ROMTOP * 6 <<20
ADRL a3, workspace
ADRL lr,RamAd
LDR lr, [lr]
ADD a3, a3, lr
LDMIA a3, {a1, a2} ; a1=base, a2=size
[ HALDebug
bl HAL_DebugTXStrInline
DCB "HalStartup3 .. rst rsz",10,0
LDMIA a3, {v3, v4} ; v3=base, v4=size
[ HALDebug
ADRL a1, reset
BL HAL_DebugHexTX4
MOV a1, v3
BL HAL_DebugHexTX4
MOV a1, v4
BL HAL_DebugHexTX4
BL HAL_DebugTXStrInline
DCB "ROM start, RAM start, RAM size", 10, 0
ALIGN
]
relocate_code
; Relocate ROM to high end of RAM
ADRL v1, HAL_Base + OSROM_HALSize
LDR v2, [v1, #OSHdr_ImageSize]
LDR lr, [v1, #OSHdr_Flags]
TST lr, #OSHdrFlag_SupportsCompression
LDRNE lr, [v1, #OSHdr_CompressedSize]
MOVEQ lr, v2
SUB v1, v1, #OSROM_HALSize ; Start of HAL
ADD v2, v2, #OSROM_HALSize ; Size of HAL+OS
ADD lr, lr, #OSROM_HALSize ; Size of compressed HAL+OS
ADD v5, v1, lr ; End of OS
ADD v7, v3, v4 ; End of RAM
SUB ip, v7, v2 ; New start address of HAL
CMP v1, ip
BEQ relocate_10 ; No copy needed
CMP v1, v7
BHI relocate_20 ; We're in some ROM above RAM. OK to continue with copy.
CMP v5, ip
BLS relocate_20 ; We're in some ROM/RAM below our copy destination. OK to continue with copy.
; Else we currently overlap the area we want to copy ourselves into.
SUB ip, v1, lr ; Copy the HAL+OS to just before itself.
relocate_20
MOV a1, ip ; Copy dest
MOV a2, v1 ; Copy source
MOV a3, lr ; Copy length
relocate_30
LDR a4, [a2], #4
SUBS a3, a3, #4
STR a4, [a1], #4
BGT relocate_30
MOV a1, #0
MCR p15, 0, a1, c7, c10, 4 ; drain write buffer
MCR p15, 0, a1, c7, c5, 0 ; invalidate I-Cache
; Jump to our new copy
ADR a1, relocate_code
SUB a2, ip, v1
ADD a1, a1, a2 ; relocate our branch target
ADD v8, v8, a2 ; Update OS entry table ptr
MOV pc, a1
relocate_10
; Copy completed, reset stack & workspace ptrs
ADD sp, v3, #4096 ; Use RAM for stack instead of bits of ROM
ADRL sb, workspace ; However workspace is still in ROM :(
[ HALDebug
BL HAL_DebugTXStrInline
DCB "ROM relocated", 10, 0
ALIGN
bl HAL_DebugHexTX4 ; ram start
mov a1, a2
bl HAL_DebugHexTX4 ; ram end
LDMIA a3, {a1, a2}
]
; debug hack to force 128meg ram and 6meg rom
; MOV v2, #ROMTOP ;start of available RAM, after HAL + OS image
; MOV a1, #RAMTOP ; end of RAM
ADD v2, a1, #ROMTOP ; start of free ram
ADD a1, a2, a1 ; end of RAM
]
; Clear RAM
; v3 is start of RAM
; ip is end of RAM/start of ROM
; Note this code will clear the stack, but there shouldn't be anything on it yet anyway
MOV a1, ip
MOV a2, #0
MOV a3, #0
MOV a4, #0
MOV v1, #0
MOV v4, #0
MOV v5, #0
MOV v7, #0
MOV ip, #0
MOV lr, #0
clear_lp
STMDB a1!,{a2-a4,v4,v5,v7,ip,lr}
STMDB a1!,{a2-a4,v4,v5,v7,ip,lr}
STMDB a1!,{a2-a4,v4,v5,v7,ip,lr}
STMDB a1!,{a2-a4,v4,v5,v7,ip,lr}
CMP a1, v2
BHI clear_lp
mov a2, v2
; a2 now -> first free ram location
ADRL a3, workspace
ADRL lr,RamAd
LDR lr, [lr]
ADD lr, a3, lr
LDR a3, [lr, #4] ; size
SUB a3, a3, #ROMTOP ; less what is used
ADD a3, a3, a2
clear_lp1
STMDB a1!,{a2-a4,v1,v4,v5,v7,lr}
STMDB a1!,{a2-a4,v1,v4,v5,v7,lr}
STMDB a1!,{a2-a4,v1,v4,v5,v7,lr}
STMDB a1!,{a2-a4,v1,v4,v5,v7,lr}
CMP a1, v3
BHI clear_lp1
mov a2, v3
MOV a3, ip
[ HALDebug
bl HAL_DebugTXStrInline
DCB "HalStartup3 .. rst rend",10,0
......@@ -538,6 +580,14 @@ HAL_Init
mov sb, a4
STR a3, VC_Size ; VC Start
STR a2, VC_Base ; VC_Size
ADRL sb, workspace ; where we remembered it is
LDR a3, Board_Model
LDR a2, Board_Revision
LDR a1, ARM_DMAChannels
mov sb, a4
STR a3, Board_Model
STR a2, Board_Revision
STR a1, ARM_DMAChannels
MOV a1, #0 ; map in the whole of the VC memory as
; IO to avoid subsequent logical
......
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