-
Ben Avison authored
Detail: * Engage the GPIO controller's pull-up resistors on SDCLK, CMD and DAT0-DAT3. In tests, this seems to address the worst of the unreliability we have seen previously. * Remove the entry to change the bus between push-pull and open-drain modes. The BCM2835 simply doesn't seem to be able to do this. Fortunately, all the cards I have tested seem to be OK with the GPIO controller's pull-up on the CMD line (however strong that is - it's undocumented) engaged at all times. * Time a dummy command in order to calculate the speed of the input clock to the SD controller block (there doesn't appear to be any way to read its speed directly!) This is necessary because recent versions of the firmware have not only changed the default clock speed, but even made it a user-configurable option in config.txt. It's very important that we know how fast it is - if we set the dividers so SDCLK is too slow, then the workaround for the register write bug won't work, too fast and we overclock the cards, potentially damaging them. * Re-enable high speed mode. As long as we don't use the High Speed Enable bit in Host Control 1 (see change in SDIODriver 0.03) this seems to work for me. Admin: Tested against my collection of test cards on a Raspberry Pi with the firmware from the 2012-06-22 commit on github, and with init_emmc_clock=100000000 in config.txt (though other values, or the absence of that line, or the entire file, should also work). The only issues I had appeared to be due to mechanical problems with the SD socket, and went away after the card was reseated one or more times. Version 0.10. Tagged as 'BCM2835-0_10'
60ebea68