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Ben Avison authored
Detail: * For now, this uses the legacy interrupt controller, whose register layout has unfortunately changed in some unhelpful ways. There is also a GICv2 in the SoC, which we will need to transition across to in order to use some of the newer peripherals (including USB3 and gigabit Ethernet). * This requires a corresponding set of changes to start.elf: substitute all three instances of &E30011E7 with &E3001000. * FIQs are not currently supported, as the legacy interrupt controller has changed how these are handled. It seems likely that we'll transition to GIC before too long, which means it's not worth bothering to implement them for the legacy interrupt controller.
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