Be cautious about cylinder rounding

Although the fragment clamping is likely to kick in first, be more careful when rounding up/down to cylinder boundaries (for read ahead/write behind).

Version 3.60. Tagged as 'FileCore-3_60'

VersionASM

@@ -11,13 +11,13 @@
                         GBLS    Module_HelpVersion
                         GBLS    Module_ComponentName
                         GBLS    Module_ComponentPath
-Module_MajorVersion     SETS    "3.59"
-Module_Version          SETA    359
+Module_MajorVersion     SETS    "3.60"
+Module_Version          SETA    360
 Module_MinorVersion     SETS    ""
-Module_Date             SETS    "06 Apr 2013"
-Module_ApplicationDate  SETS    "06-Apr-13"
+Module_Date             SETS    "04 May 2013"
+Module_ApplicationDate  SETS    "04-May-13"
 Module_ComponentName    SETS    "FileCore"
 Module_ComponentPath    SETS    "castle/RiscOS/Sources/FileSys/FileCore"
-Module_FullVersion      SETS    "3.59"
-Module_HelpVersion      SETS    "3.59 (06 Apr 2013)"
+Module_FullVersion      SETS    "3.60"
+Module_HelpVersion      SETS    "3.60 (04 May 2013)"
                         END

VersionNum

-/* (3.59)
+/* (3.60)
  *
  * This file is automatically maintained by srccommit, do not edit manually.
  * Last processed by srccommit version: 1.1.
  *
  */
-#define Module_MajorVersion_CMHG        3.59
+#define Module_MajorVersion_CMHG        3.60
 #define Module_MinorVersion_CMHG        
-#define Module_Date_CMHG                06 Apr 2013
+#define Module_Date_CMHG                04 May 2013
 
-#define Module_MajorVersion             "3.59"
-#define Module_Version                  359
+#define Module_MajorVersion             "3.60"
+#define Module_Version                  360
 #define Module_MinorVersion             ""
-#define Module_Date                     "06 Apr 2013"
+#define Module_Date                     "04 May 2013"
 
-#define Module_ApplicationDate          "06-Apr-13"
+#define Module_ApplicationDate          "04-May-13"
 
 #define Module_ComponentName            "FileCore"
 #define Module_ComponentPath            "castle/RiscOS/Sources/FileSys/FileCore"
 
-#define Module_FullVersion              "3.59"
-#define Module_HelpVersion              "3.59 (06 Apr 2013)"
-#define Module_LibraryVersionInfo       "3:59"
+#define Module_FullVersion              "3.60"
+#define Module_HelpVersion              "3.60 (04 May 2013)"
+#define Module_LibraryVersionInfo       "3:60"

s/FileCore80

@@ -149,7 +149,6 @@ ReadBuffersWork # 0
         ASSERT  ReadRamAdjust = PendingReadEnd+4
         ASSERT  ReadDiscRec = ReadRamAdjust+4
         ASSERT  ReadCylLength = ReadDiscRec+4
-        ASSERT  ReadProcessBlock = ReadCylLength+4
         Push    "R0-R2,R6,LR"   ; note R0 is junk value for PendingReadStart
 
 ;DEAL WITH SEQUENTIAL / NON SEQUENTIAL
@@ -496,9 +495,16 @@ ReadBuffersWork # 0
         Push    "LR"
         BL      Divide                  ; r0 := disc address / cylinder size
         Pull    "LR"                    ; r1 := remainder
+      [ BigFiles
+        CMP     R1, R2
+        MOVHI   R0, #0
+        SUBLS   R0, R2, R1
+        MOVLS   R0, R0, LSL LR          ; cylinder round down underflowed
+      |
         SUBS    R0, R2, R1
         MOVMI   R0, #0
         MOV     R0, R0, LSL LR
+      ]
  |
         SUB     R2, FileOff, #1
         ADD     R0, R2, DiscAdjust
@@ -575,10 +581,19 @@ ReadBuffersWork # 0
         Push    "LR"
         BL      Divide                  ; r0 := disc address / cylinder size
         Pull    "R0"                    ; r1 := remainder
+      [ BigFiles
+        CMPS    R1, #1
+        SUB     R1, TransferEnd, R1, LSL R0
+        LDRCS   LR, [SP,#4+ReadCylLength]
+        ADDCSS  R1, R1, LR, LSL R0
+        CMPCC   R1, #-1*K
+        LDRCS   R1, =-1*K               ; cylinder round up went into dead-band
+      |
         TEQS    R1, #0
         SUB     R1, TransferEnd, R1, LSL R0
         LDRNE   LR, [SP,#4+ReadCylLength]
         ADDNE   R1, R1, LR, LSL R0
+      ]
  |
         ADD     R0, TransferEnd, DiscAdjust
         BIC     R0, R0, #DiscBits
@@ -736,7 +751,11 @@ ReadBuffersWork # 0
         SUB     R2, R2, R1
         LDR     R1, [SP,#ReadCylLength]
         ADD     R2, R2, R1
-        MOV     LR, R2, LSL LR
+        MOVS    LR, R2, LSL LR
+      [ BigFiles
+        CMPCC   LR, #-1*K
+        LDRCS   LR, =-1*K               ; cylinder round up went into dead-band
+      ]
         CMPS    LR, FragEnd
         MOVHI   LR, FragEnd
 
@@ -1040,7 +1059,6 @@ WriteBuffersWork        # 0
         BVS     %BT05
         ASSERT  WriteProcessBlock = 0
         ASSERT  WriteRamAdjust = 4
-        ASSERT  WriteBuffersWork = 8
         Push    "R0,R2"
 
 ;IF FLOPPY LET WRITE BEHIND ON ANY OTHER FLOPPY FINISH