Commits (14)
  • ROOL's avatar
    Library updates · 108b8e58
    ROOL authored
    Detail:
      Acorn/rpcgen update to fix NULL pointer dereference building NFS' RPC descriptions
      Build/FAppend update to support an arbitrary number of source files rather than fixed limit of 9
    
    Version 1.93. Tagged as 'Library-1_93'
    108b8e58
  • ROOL's avatar
    Updated srcbuild binary · 6946951c
    ROOL authored
    Admin:
      srcbuild-0_54 built with cc 5.77.
    
    Version 1.94. Tagged as 'Library-1_94'
    6946951c
  • Robert Sprowson's avatar
    Update to Squish 1.16 · 2335669e
    Robert Sprowson authored
    Version 1.95. Tagged as 'Library-1_95'
    2335669e
  • Robert Sprowson's avatar
    Add a minimal Touch tool · 742c9bef
    Robert Sprowson authored
    Previously we aliased ${TOUCH} to *Create, but now it's useful to have at least 1 other option found in Unix touch, -r which uses a file as the reference date to touch the other files with.
    Delete unused Version tool.
    
    Version 1.96. Tagged as 'Library-1_96'
    742c9bef
  • Robert Sprowson's avatar
    Add the later ARMv8 AArch32 opcodes · 21ff3d72
    Robert Sprowson authored
    ARM have added SETPAN, ESB, TSB, CSDB, PSSBB, SSBB since the earlier ARM ARM that the decgen encodings were based on.
    Add these, update the page references from the newer ARM ARM, and make some holes in the ARMv7 encoding to accommodate.
    
    Version 1.97. Tagged as 'Library-1_97'
    21ff3d72
  • Robert Sprowson's avatar
    Update rompress · 853541f9
    Robert Sprowson authored
    rompress 0.04 rebuilt against Kernel-6_22 for the revised value of HighestOSEntry. Should fix the problem at the final stage of ROMs which are compressed erroring now there's an extra OS entry.
    Built in the Disc environment with cc 5.78.
    
    Version 1.98. Tagged as 'Library-1_98'
    853541f9
  • Timothy E Baldwin's avatar
    Fix InstallTools race (mostly) · d8dc5b93
    Timothy E Baldwin authored
    Obey$Dir can change during a Obey file run in a Taskwindow,
    in particular writing to the output stream can trigger the
    loading of a Taskwindow server such as !Edit.
    d8dc5b93
  • ROOL's avatar
    Update InstallTools,fd7 · 340a7f86
    ROOL authored
    Version 1.99. Tagged as 'Library-1_99'
    340a7f86
  • ROOL's avatar
    Install Touch for DDE · 11d8b9fe
    ROOL authored
    Add a copy of Touch during Install_DDE as the shared makefiles now use it for reasons other than creating empty files in some situations.
    
    Version 2.00. Tagged as 'Library-2_00'
    11d8b9fe
  • ROOL's avatar
    Install Touch alongside FAppend · d59bb48b
    ROOL authored
    Version 2.00. Not tagged
    d59bb48b
  • ROOL's avatar
    Updated srcbuild binary · 74d47b92
    ROOL authored
    Admin:
      srcbuild-0_57 built with cc 5.80.
    
    Version 2.01. Tagged as 'Library-2_01'
    74d47b92
  • ROOL's avatar
    Update Sed · 839146ca
    ROOL authored
    Detail:
      From sed-0_03, built with GCC 4.7.4r3 and libgnu4-0_02.
    
    Version 2.02. Tagged as 'Library-2_02'
    839146ca
  • Ben Avison's avatar
    Make auto-generated headers usable with GCC · 6e9033a2
    Ben Avison authored
    Wrap Norcroft-specific pragmas in #ifdef __CC_NORCROFT.
    
    Version 2.03. Tagged as 'Library-2_03'
    6e9033a2
  • Ben Avison's avatar
    Fix InstViaRG for cross-compilation use · 6b150761
    Ben Avison authored
    This script made efforts to support use from Posix environments, but slipped
    up when interfacing to ResGen.
    
    Version 2.04. Tagged as 'Library-2_04'
    6b150761
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......@@ -88,8 +88,10 @@ sub processfile {
#ifndef $define
#define $define
#ifdef __CC_NORCROFT
#pragma force_top_level
#pragma include_only_once
#endif
END
while(<IN>) {
......
......@@ -73,6 +73,12 @@ sub scandir
next if ($leafname =~ m/^\./);
$srcpath = $src . $sep . $leafname;
$dstpath = $dst . substr($srcpath, $baselen);
if ($posix)
{
# Viafile expects destinations in RISC OS format
$dstpath =~ s/\//./g;
$dstpath =~ s/,[0-9a-f]{3}$//;
}
if (-f $srcpath)
{
# It's a file, append to the via file
......
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......@@ -12,14 +12,15 @@
| See the License for the specific language governing permissions and
| limitations under the License.
|
Echo This script will take the main build tools from a current copy of the Acorn
Echo C/C++ tools suite (as installed from CD) and install the main tools into the
Echo Shared Source RISC OS build directory so that you can build Shared Source RISC
Echo OS components.
Set Build$LibDir <Obey$Dir>
Echo This script will take the main build tools from a current install of the
Echo Desktop Development Environment and install the main tools into
Echo the RISC OS build directory so that you can build RISC OS components.
Echo
Echo Checking environment...
IfThere <Obey$Dir>.Acorn Then Else Error This script must be run from within the Shared Source RISC OS 'Library' directory.
IfThere <Build$LibDir>.Acorn Then Else Error This script must be run from within the RISC OS 'Library' directory.
Echo
Echo Checking that the AcornC/C++ directory has been 'seen' by the filer...
......@@ -27,56 +28,56 @@ If "<SetPaths32$Dir>" = "" Then Error Please make sure you have run the AcornC/C
Echo
Echo Installing Acorn Make Utility...
Copy <SetPaths32$Dir>.Lib32.amu <Obey$Dir>.Acorn.amu A~C~D~FLN~P~Q~R~S~T~V
Copy <SetPaths32$Dir>.Lib32.amu <Build$LibDir>.Acorn.amu A~C~D~FLN~P~Q~R~S~T~V
Echo
Echo Installing C++...
Copy <SetPaths32$Dir>.Lib32.c++ <Obey$Dir>.Acorn.c++ A~C~D~FLN~P~Q~R~S~T~V
Copy <SetPaths32$Dir>.Lib32.c++ <Build$LibDir>.Acorn.c++ A~C~D~FLN~P~Q~R~S~T~V
Echo
Echo Installing the C Compiler...
Copy <SetPaths32$Dir>.Lib32.cc <Obey$Dir>.Acorn.cc A~C~D~FLN~P~Q~R~S~T~V
Copy <SetPaths32$Dir>.Lib32.cc <Build$LibDir>.Acorn.cc A~C~D~FLN~P~Q~R~S~T~V
Echo
Echo Installing C Front...
Copy <SetPaths32$Dir>.Lib32.cfront <Obey$Dir>.Acorn.cfront A~C~D~FLN~P~Q~R~S~T~V
Copy <SetPaths32$Dir>.Lib32.cfront <Build$LibDir>.Acorn.cfront A~C~D~FLN~P~Q~R~S~T~V
Echo
Echo Installing the C Module Header Generator...
Copy <SetPaths32$Dir>.Lib32.cmhg <Obey$Dir>.Acorn.cmhg A~C~D~FLN~P~Q~R~S~T~V
Copy <SetPaths32$Dir>.Lib32.cmhg <Build$LibDir>.Acorn.cmhg A~C~D~FLN~P~Q~R~S~T~V
Echo
Echo Installing the Acorn Object File Decoder...
Copy <SetPaths32$Dir>.Lib32.decaof <Obey$Dir>.Acorn.decaof A~C~D~FLN~P~Q~R~S~T~V
Copy <SetPaths32$Dir>.Lib32.decaof <Build$LibDir>.Acorn.decaof A~C~D~FLN~P~Q~R~S~T~V
Echo
Echo Installing the Library File Processor...
Copy <SetPaths32$Dir>.Lib32.libfile <Obey$Dir>.Acorn.libfile A~C~D~FLN~P~Q~R~S~T~V
Copy <SetPaths32$Dir>.Lib32.libfile <Build$LibDir>.Acorn.libfile A~C~D~FLN~P~Q~R~S~T~V
Echo
Echo Installing the Linker...
Copy <SetPaths32$Dir>.Lib32.link <Obey$Dir>.Acorn.link A~C~D~FLN~P~Q~R~S~T~V
Copy <SetPaths32$Dir>.Lib32.link <Build$LibDir>.Acorn.link A~C~D~FLN~P~Q~R~S~T~V
Echo
Echo Installing the Object Assembler...
Copy <SetPaths32$Dir>.Lib32.objasm <Obey$Dir>.Acorn.objasm A~C~D~FLN~P~Q~R~S~T~V
Copy <SetPaths32$Dir>.Lib32.objasm <Build$LibDir>.Acorn.objasm A~C~D~FLN~P~Q~R~S~T~V
Echo
Echo Installing the Object File Statistics Tool...
Copy <SetPaths32$Dir>.Lib32.objsize <Obey$Dir>.Acorn.objsize A~C~D~FLN~P~Q~R~S~T~V
Copy <SetPaths32$Dir>.Lib32.objsize <Build$LibDir>.Acorn.objsize A~C~D~FLN~P~Q~R~S~T~V
Echo
Echo Installing the Resource Area Generator...
Copy <SetPaths32$Dir>.Lib32.ResGen <Obey$Dir>.Acorn.ResGen A~C~D~FLN~P~Q~R~S~T~V
Copy <SetPaths32$Dir>.Lib32.ResGen <Build$LibDir>.Acorn.ResGen A~C~D~FLN~P~Q~R~S~T~V
Echo
Echo Installing the pre-built C++ libraries...
CDir <Obey$Dir>.^.Export
CDir <Obey$Dir>.^.Export.APCS-32
CDir <Obey$Dir>.^.Export.APCS-32.Lib
CDir <Build$LibDir>.^.Export
CDir <Build$LibDir>.^.Export.APCS-32
CDir <Build$LibDir>.^.Export.APCS-32.Lib
Set C++Lib$Dir <SetPaths32$Dir>.^.Libraries.c++lib
IfThere <C++Lib$Dir> Then Else Set C++Lib$Dir <SetPaths32$Dir>.^.Export.APCS-32.Lib.c++lib
Copy <C++Lib$Dir> <Obey$Dir>.^.Export.APCS-32.Lib.c++lib A~C~D~FLN~P~QR~S~T~V
Copy <C++Lib$Dir> <Build$LibDir>.^.Export.APCS-32.Lib.c++lib A~C~D~FLN~P~QR~S~T~V
Unset C++Lib$Dir
Echo
......@@ -86,4 +87,4 @@ Echo
Echo ------------------------------------------------------------------------------
Echo
Echo WARNING: these tools are commercial products. Do not include them in any
Echo distributions of your Shared Source RISC OS components.
Echo distributions of your Open Source RISC OS components.
......@@ -26,6 +26,7 @@ install_DDE: install_Dir
${CP} Unix.chmod ${INSTDIR}.Unix.chmod ${CPFLAGS}
${CP} Unix.mkdir ${INSTDIR}.mkdir ${CPFLAGS}
${CP} Build.FAppend ${INSTDIR}.FAppend ${CPFLAGS}
${CP} Build.Touch ${INSTDIR}.Touch ${CPFLAGS}
${CP} Build.InstRes ${INSTDIR}.Build.InstRes ${CPFLAGS}
${CP} Build.InstViaRG ${INSTDIR}.Build.InstViaRG ${CPFLAGS}
......
......@@ -15,7 +15,8 @@
(cond:4)0001(op:4)(:12)1001(:4) {ne(cond,15)} {lt(op,8)} {band(op,3)} UNDEFINED
# A5.2.11
(cond:4)00110(op)10(op1:4)(:8)(op2:8) {ne(cond,15)} {lnot(op)} {lnot(op1)} {gt(op2,5)} {lt(op2,0xf0)} UNALLOCATED_HINT
# > SEVL != ESB != TSB != CSDB < DBG
(cond:4)00110(op)10(op1:4)(:8)(op2:8) {ne(cond,15)} {lnot(op)} {lnot(op1)} {gt(op2,5)} {land(land(ne(op2,16),ne(op2,18)),ne(op2,20))} {lt(op2,0xf0)} UNALLOCATED_HINT
# A5.2.12
(cond:4)00010(op:2)0(op1:4)(:8)0(op2:3)(:4) {ne(cond,15)} {eq(op2,1)} {lnot(band(op,1))} UNDEFINED
......@@ -68,7 +69,8 @@
11110(op1:7)(Rn:4)(:8)(op2:4)(:4) {lt(op1,16)} UNDEFINED
11110(op1:7)(Rn:4)(:8)(op2:4)(:4) {eq(op1,16)} {lnot(band(Rn,1))} {band(op2,2)} UNDEFINED
11110(op1:7)(Rn:4)(:8)(op2:4)(:4) {eq(op1,16)} {band(Rn,1)} {op2} UNDEFINED
11110(op1:7)(Rn:4)(:8)(op2:4)(:4) {gt(op1,16)} {lt(op1,32)} UNDEFINED
11110(op1:7)(Rn:4)(:8)(op2:4)(:4) {eq(op1,17)} {op2} UNDEFINED # See SETPAN when op2 zero
11110(op1:7)(Rn:4)(:8)(op2:4)(:4) {gt(op1,17)} {lt(op1,32)} UNDEFINED
11110(op1:7)(Rn:4)(:8)(op2:4)(:4) {eq(band(op1,0x77),0x41)} UNALLOCATED_MEM_HINT
11110(op1:7)(Rn:4)(:8)(op2:4)(:4) {eq(band(op1,0x77),0x50)} UNDEFINED
11110(op1:7)(Rn:4)(:8)(op2:4)(:4) {eq(band(op1,0x77),0x51)} {eq(Rn,15)} UNPREDICTABLE
......@@ -80,7 +82,6 @@
11110(op1:7)(Rn:4)(:8)(op2:4)(:4) {eq(band(op1,0x61),0x61)} {band(op2,1)} UNDEFINED
11110(op1:7)(Rn:4)(:8)(op2:4)(:4) {eq(band(op1,0x63),0x63)} {lnot(band(op2,1))} UNPREDICTABLE
# A8.8.1 ADC (immediate)
# A1 ARMv4*, ARMv5T*, ARMv6*, ARMv7
(cond:4)0010101S(Rn:4)(Rd:4)(imm12:12) {ne(cond,15)} ADC_imm_A1 # NOTE: Action must handle "SUBS PC, LR and related instructions"
......
# From DDI 0487A.g section J5
# From DDI 0487D.b
# Can be overlaid directly on top of the ARMv7 encodings
# F6.1.54 Load-Aquire
# F5.1.57 Load-Aquire
(cond:4)00011(sz:2)1(Rn:4)(Rt:4)(11)001001(1111) {ne(cond,15)} {ne(sz,1)} LDA_A1
# F6.1.210 Store-Release
# F5.1.216 Store-Release
(cond:4)00011(sz:2)0(Rn:4)(1111)(11)001001(Rt:4) {ne(cond,15)} {ne(sz,1)} STL_A1
# F6.1.56 Load-Aquire Exclusive
# F5.1.59 Load-Aquire Exclusive
(cond:4)00011001(Rn:4)(Rt:4)(11)101001(1111) {ne(cond,15)} LDAEX_A1
(cond:4)00011011(Rn:4)(Rt:4)(11)101001(1111) {ne(cond,15)} LDAEXD_A1
(cond:4)00011101(Rn:4)(Rt:4)(11)101001(1111) {ne(cond,15)} LDAEXB_A1
(cond:4)00011111(Rn:4)(Rt:4)(11)101001(1111) {ne(cond,15)} LDAEXH_A1
# F6.1.212 Store-Release Exclusive
# F5.1.218 Store-Release Exclusive
(cond:4)00011000(Rn:4)(Rd:4)(11)101001(Rt:4) {ne(cond,15)} STLEX_A1
(cond:4)00011010(Rn:4)(Rd:4)(11)101001(Rt:4) {ne(cond,15)} STLEXD_A1
(cond:4)00011100(Rn:4)(Rd:4)(11)101001(Rt:4) {ne(cond,15)} STLEXB_A1
(cond:4)00011110(Rn:4)(Rd:4)(11)101001(Rt:4) {ne(cond,15)} STLEXH_A1
# Table J5.7.1 External Debug
# Table H2.4.6 External Debug
# DCPS1/2/3 has no A32 encoding
# F6.1.50 Halting breakpoint
# F5.1.53 Halting breakpoint
(cond:4)00010(op:2)0(imm12:12)0(op2:3)(imm4:4) {ne(cond,15)} {eq(op2,7)} {lnot(op)} HLT_A1
# Table J5.7.2 Barriers and hints
# Barriers and hints
# DMB OSHLD/NSHLD/ISHLD/LD see F6.1.44, same encoding as ARMv7
# DSB OSHLD/NSHLD/ISHLD/LD see F6.1.45, same encoding as ARMv7
# PSSBB see F5.1.141, ARMv8.4, encoded in DSB space as per ARMv7
# SSBB see F5.1.212, ARMv8.4, encoded in DSB space as per ARMv7
# F6.1.179 Send event local
# F5.1.184 Send event local
(cond:4)001100100000(11110000)00000101 {ne(cond,15)} SEVL_A1
# Table J5.7.3 TLB maintenance
# Accessed using MCR operations, so no new opcodes
# F5.1.52 Error sync barrier
# ARMv8.2
(cond:4)001100100000(11110000)00010000 {ne(cond,15)} ESB_A1
# F6.1.40 CRC
# F5.1.260 Trace sync barrier
# ARMv8.4
(cond:4)001100100000(11110000)00010010 {ne(cond,15)} TSB_A1
# F5.1.41 Consumption of speculative data barrier
# ARMv8.4
(cond:4)001100100000(11110000)00010100 {ne(cond,15)} CSDB_A1
# F5.1.182 SETPAN
# ARMv8.1
111100010001(0000000000)I(0)0000(0000) SETPAN_A1
# F5.1.39 CRC
(cond:4)00010(sz:2)0(Rn:4)(Rd:4)(0)(0)C(0)0(op2:3)(Rm:4) {ne(cond,15)} {eq(op2,4)} CRC_A1
# Note that [LDR|STR]EX[B|H|D] appear here because previously
# bits 8-11 SBO, but that recommendation has changed because
# ARMv8 has added [LDA|STL]EX[B|H|D] in the same instruction space.
# F4.2.10
# F4.1.3
(cond:4)0001(op:4)(:8)(11)(op1:2)1001(:4) {ne(cond,15)} {lor(eq(op,8),eq(op,9))} {eq(op1,1)} UNDEFINED
(cond:4)0001(op:4)(:8)(11)(op1:2)1001(:4) {ne(cond,15)} {lor(eq(op,10),eq(op,11))} {lnot(band(op1,2))} UNDEFINED
(cond:4)0001(op:4)(:8)(11)(op1:2)1001(:4) {ne(cond,15)} {ge(op,12)} {eq(op1,1)} UNDEFINED
......
# From DDI 0487A.g section J5
# From DDI 0487D.b
# Overlay this with ARMv7 encodings to fill the holes where ARMv8 additions are
# F6.1.54 Load-Aquire
# F6.1.210 Store-Release
# F6.1.56 Load-Aquire Exclusive
# F6.1.212 Store-Release Exclusive
# F5.1.57 Load-Aquire
# F5.1.216 Store-Release
# F5.1.59 Load-Aquire Exclusive
# F5.1.218 Store-Release Exclusive
# These alias into the LDREX/STREX family (see below)
# F6.1.50 Halting breakpoint
# F5.1.53 Halting breakpoint
(cond:4)00010(op:2)0(op1:4)(:8)0(op2:3)(:4) {ne(cond,15)} {eq(op2,7)} {lnot(op)} UNDEFINED
# F6.1.179 Send event local
# F5.1.184 Send event local
(cond:4)001100100000(11110000)00000101 {ne(cond,15)} UNALLOCATED_MEM_HINT
# F6.1.40 CRC
# F5.1.52 Error sync barrier
(cond:4)001100100000(11110000)00010000 {ne(cond,15)} UNALLOCATED_MEM_HINT
# F5.1.260 Trace sync barrier
(cond:4)001100100000(11110000)00010010 {ne(cond,15)} UNALLOCATED_MEM_HINT
# F5.1.41 Consumption of speculative data barrier
(cond:4)001100100000(11110000)00010100 {ne(cond,15)} UNALLOCATED_MEM_HINT
# F5.1.182 SETPAN
111100010001(0000000000)(:1)(0)0000(0000) UNDEFINED
# F5.1.39 CRC
(cond:4)00010(op:2)0(op1:4)(:8)0(op2:3)(:4) {ne(cond,15)} {eq(op2,4)} UNDEFINED
# Note that [LDR|STR]EX[B|H|D] appear here because previously
......
No preview for this file type
/* (1.92)
/* (2.04)
*
* This file is automatically maintained by srccommit, do not edit manually.
* Last processed by srccommit version: 1.1.
*
*/
#define Module_MajorVersion_CMHG 1.92
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 25 Feb 2018
#define Module_MajorVersion_CMHG 2.04
#define Module_MinorVersion_CMHG
#define Module_Date_CMHG 22 Aug 2020
#define Module_MajorVersion "1.92"
#define Module_Version 192
#define Module_MajorVersion "2.04"
#define Module_Version 204
#define Module_MinorVersion ""
#define Module_Date "25 Feb 2018"
#define Module_Date "22 Aug 2020"
#define Module_ApplicationDate "25-Feb-18"
#define Module_ApplicationDate "22-Aug-20"
#define Module_ComponentName "Library"
#define Module_ComponentPath "mixed/RiscOS/Library"
#define Module_FullVersion "1.92"
#define Module_HelpVersion "1.92 (25 Feb 2018)"
#define Module_LibraryVersionInfo "1:92"
#define Module_FullVersion "2.04"
#define Module_HelpVersion "2.04 (22 Aug 2020)"
#define Module_LibraryVersionInfo "2:4"